Heterojunction field-effect transistor having germanium-doped source and drain regions

A monolithic microwave integrated circuit comprising:

• a heterojunction field-effect transistor comprising:
• a semiconductor structure made up of superposed layers, comprising in a stacking order on a substrate layer:
• a buffer layer composed of a material having a hexagonal crystal structure of Ga(1-x-y)Al(x)In(y)N, where x and y are comprised between 0 inclusive and 1 inclusive, the sum x+y being lower than or equal to 1,
• a channel layer on the buffer layer, the channel layer being composed of a material having a hexagonal crystal structure of Ga(1-z-w)Al(z)In(w)N, where z and w are comprised between 0 inclusive and 1 inclusive, the sum z+w being lower than or equal to 1, at least one of z and w being different from x or y, respectively, and
• a barrier layer on the channel layer, the barrier layer being composed of a material having a hexagonal crystal structure of Ga(1-z′-w′)Al(z′)In(w′)N, where z′ and w′ are comprised between 0 inclusive and 1 inclusive, the sum z′+w′ being lower than or equal to 1, at least one of z′ and w′ being different from z or w, respectively,
• a layer of epitaxial material, deposited by epitaxy on a growth zone corresponding to the location of an opening formed in a dielectric masking layer, the growth material having a hexagonal crystal structure and being composed of Ga(1-x′-y′)Al(x′)In(y′)N and previously-doped with germanium, where x′ and y′ are comprised between 0 inclusive and 1 inclusive, the sum x′+y′ being lower than or equal to 1, at a temperature sufficient for constituent atoms of the semiconductor material having the hexagonal crystal structure of Ga(1-x′-y′)Al(x′)In(y′)N doped with germanium to migrate toward the growth zone, by mass transport, and
• a contact electrode on the layer of growth material and a gate electrode in a location outside of the growth zone,
• wherein the material doped with germanium has a sufficiently defined crystal structure for lateral edges of the growth layer to have an inclination between 5° and 60° relative to the vertical.

A process for fabricating a heterojunction field-effect transistor comprising a semiconductor structure made up of superposed layers, the process comprising:

• a) providing on a substrate layer:
• a buffer layer composed of a semiconductor material having a hexagonal crystal structure of Ga(1-x-y)Al(x)In(y)N, where x and y are comprised between 0 inclusive and 1 inclusive, the sum x+y being lower than or equal to 1,
• a channel layer on the buffer layer, the channel layer being composed of a material having a hexagonal crystal structure of Ga(1-z-w)Al(z)In(w)N, where z and w are comprised between 0 inclusive and 1 inclusive, the sum z+w being lower than or equal to 1, at least one of z and w being different from x or y, respectively, and
• a barrier layer on the channel layer, the barrier layer being composed of a material having a hexagonal crystal structure of Ga(1-z′-w′)Al(z′)In(w′)N, where z′ and w′ are comprised between 0 inclusive and 1 inclusive, the sum z′+w′ being lower than or equal to 1, at least one of z′ and w′ being different from z or w, respectively;
• b) depositing a dielectric masking layer on the barrier layer;
• c) forming an opening in the dielectric masking layer;
• d) growing by epitaxy a semiconductor material having a hexagonal crystal structure of Ga(1-x′-y′)Al(x′)In(y′)N and previously-doped with germanium, where x′ and y′ are comprised between 0 inclusive and 1 inclusive, the sum x′+y′ being lower than or equal to 1, on a growth zone defined by the opening formed in the masking layer at a temperature sufficient for constituent atoms of the semiconductor material having the hexagonal crystal structure of Ga(1-x′-y′)Al(x′)In(y′)N doped with germanium to migrate toward the growth zone, by mass transport;
• e) depositing a source or drain contact electrode on the material thus deposited by epitaxy in step d);
• and
• f) depositing a gate electrode in a location outside of the growth zone.