Virtual general purpose input/output for a microcontroller
AssigneeMicroship Technology Incorporated
InventorMichael Simmons
Life of this patent
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Abstract
A microcontroller includes a general purpose input/output (GPIO) port having a plurality of bits coupled to a plurality of external pins; a first set of registers for providing at least one of first control and data input/output functionality of the GPIO port; a second set of registers for providing at least one of second control and data input/output functionality of the GPIO port; and a multiplexer and associated select register for controlling the multiplexer to control said GPIO port through either said first or second register set.
Claims21
A microcontroller comprising a plurality of general purpose input/output (GPIO) ports,
- wherein each GPIO port has a plurality of bits;
- wherein each GPIO port comprises a first set of registers for providing at least one of first control and data input/output functionality, wherein each bit of the first set of registers is assigned to a respective external pin and a second set of registers for providing at least one of second control and data input/output functionality of a secondary GPIO port, wherein each register of the second set of registers has a plurality of bits;
- a multiplexer and associated select register for controlling the multiplexer to control the respective external pin through either said first or second register set;
- and
- a peripheral pin select circuit which is programmable to assign an external pin to a selectable bit of the second set of registers,
- wherein the peripheral pin select circuit is programmed to form a virtual GPIO port controlled by a second set of registers having bits from different GPIO ports mapped to the virtual GPIO port.
A method for operating a microcontroller comprising a plurality of general purpose input/output (GPIO) ports, wherein each port has a plurality of bits, wherein each port comprises a first set of registers for providing at least one of first control and data input/output functionality, wherein each bit of the first set of registers is assigned to a respective external pin and a second set of registers for providing at least one of second control and data input/output functionality of a virtual GPIO port, and a peripheral pin select circuit which is programmable to assign an external pin to one bit of any of the second set of registers, wherein each register of the second set of registers has a plurality of bits, the method comprising:
- programming the peripheral pin select circuit to assign bits from different GPIO ports to form the virtual GPIO port;
- and
- when accessing the virtual GPIO port controlling each pin assigned to the virtual GPIO port to switch from an assigned GPIO port to the second register set of the respective pin through respective multiplexers to control respective bits of the virtual GPIO port.
A method for operating a microcontroller comprising a plurality of general purpose input/output (GPIO) ports, wherein each port has a plurality of bits, wherein each port comprises a first set of registers for providing at least one of first control and data input/output functionality, wherein each bit of the first set of registers is assigned to a respective external pin and a second set of registers for providing at least one of second control and data input/output functionality of a virtual GPIO port, and a peripheral pin select circuit which is programmable to assign an external pin to one bit of any of the second set of registers, wherein each register of the second set of registers has a plurality of bits, the method comprising:
- programming the peripheral pin select circuit to assign a first external pin being assigned to a bit of a first GPIO port to be controlled by a one bit of the virtual GPIO port;
- programming the peripheral pin select circuit to assign a second external pin being assigned to a bit of a second GPIO port different from the first GPIO port to be controlled by another bit of the virtual GPIO port;
- and
- when accessing the virtual GPIO port controlling the first and second external pin through the second register set.
Dependencies are inferred from the claim text.