# US 10,321,582 B2 · Method of manufacturing wiring board and wiring board > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,321,582 B2 - Document ID: US10321582B2 - Status: Granted - Kind: B2 - Application number: 15/652,337 - Filed: 2017-07-18 - Published: 2017-11-02 - Granted: 2019-06-11 - Earliest claimed: 2015-01-23 - Assignees: Olympus Corporation - Applicants: Olympus Corporation - Inventors: Jumpei Yoneyama - Web page: https://patentgrep.com/patent/US10321582B2 ## CPC - H05K 3/4682: {Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil} - H05K 1/11: Printed elements for providing electric connections to or between printed circuits - H05K 3/3405: {Edge mounted components, e.g. terminals} - H05K 3/368: {parallel to each other (H05K3/361 takes precedence)} - H05K 3/40: Forming printed elements for providing electric connections to or between printed circuits - H05K 3/4092: {Integral conductive tabs, i.e. conductive parts partly detached from the substrate} - H05K 3/4644: {by building the multilayer layer by layer, i.e. build-up multilayer circuits (making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602)} - H05K 2201/0367: Metallic bump or raised conductor not used as solder bump - H05K 2201/09827: Tapered, e.g. tapered hole, via or groove - H05K 2201/1075: Shape details - H05K 2201/10787: Leads having protrusions, e.g. for retention or insert stop - H05K 2201/10803: Tapered leads, i.e. leads having changing width or diameter - H05K 2201/10931: Exposed leads, i.e. encapsulation of component partly removed for exposing a part of lead, e.g. for soldering purposes - H10W 72/701: {Tape-automated bond [TAB] connectors} - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A method of manufacturing a wiring board includes a stacking process in which N (N is an integer equal to or greater than 2) wiring layers, end portions of which include linear conductor patterns, are stacked, with the end portions superimposed, via substrates (insulating layers) provided among the wiring layers and a laminated plate is manufactured and a removing process in which the insulating layers around the end portions of the conductor patterns of the laminated plate are removed to machine the end portions into N flying leads projecting from an end face. ## Claims ### Claim 1 A method of manufacturing a wiring board comprising: a stacking process in which N (N is an integer equal to or greater than 2) wiring layers, end portions of which include linear conductor patterns, are stacked, with the end portions superimposed, via insulating layers provided among the wiring layers and a laminated plate is manufactured; and a removing process in which the insulating layers around the end portions of the conductor patterns of the laminated plate are removed to machine the end portions into N flying leads projecting from an end face. ### Claim 2 (depends on 1) The method of manufacturing the wiring board according to claim 1, wherein in the stacking process, a multi-laminated plate on which a wiring layer, on which K (K is an integer equal to or greater than 2) pieces of the conductor pattern are disposed in a row, is stacked is manufactured, and the method of manufacturing the wiring board further comprises a cutting process in which the multi-laminated plate is cut in parallel to a longitudinal direction of the end portion to be singulated into K pieces of the laminated plate. ### Claim 3 (depends on 1) The method of manufacturing the wiring board according to claim 1, wherein, in the stacking process, N single-layer wiring boards configured from insulator substrates, on which the wiring layers are respectively disposed, are compression-bonded. ### Claim 4 (depends on 1) The method of manufacturing the wiring board according to claim 1, wherein, in the stacking process, a wiring-layer disposing process in which the wiring layer is disposed on the insulating layer and an insulating-layer disposing process in which a next insulating layer is disposed on the insulating layer on which the wiring layer is disposed are repeated N times. ### Claim 5 (depends on 1) The method of manufacturing the wiring board according to claim 1, wherein, in the stacking process, wiring layers including conductor patterns having at least one of a shape and a material different from at least one of a shape and a material of conductor patterns of other wiring layers and the other wiring layers are stacked. ### Claim 6 (depends on 1) The method of manufacturing the wiring board according to claim 1, wherein, in the stacking process, insulating layers having at least one of a shape and a material different from at least one of a shape and a material of other insulating layers and the other insulating layers are stacked. ### Claim 7 (depends on 1) The method of manufacturing the wiring board according to claim 1, wherein an extended section extended to one side in a width direction of the end portion of the conductor pattern is present, and in the removing process, the extended section changes to a connected section connected to another member. ### Claim 8 (depends on 1) The method of manufacturing the wiring board according to claim 1, wherein at least any one of the wiring layers includes a first conductor pattern and a second conductor pattern, the respective end portions of which are disposed in a row in parallel, and in the removing process, the end portion of the first conductor pattern and the end portion of the second conductor pattern are machined into two flying leads superimposed in a major axis perpendicular direction. ### Claim 9 (depends on 2) The method of manufacturing the wiring board according to claim 2, wherein, in the cutting process, the multi-laminated plate is cut such that at least a part of at least one side surface of the conductor pattern is exposed. ### Claim 10 (depends on 1) The method of manufacturing the wiring board according to claim 1, further comprising, after the cutting process, a polishing process in which a cut surface on which at least a part of the conductor pattern is exposed is polished. ### Claim 11 (depends on 9) The method of manufacturing the wiring board according to claim 9, further comprising a mounting process in which a chip component is surface-mounted on the exposed part of the conductor pattern.