# US 10,320,430 B2 · Transmitter with power supply rejection > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,320,430 B2 - Document ID: US10320430B2 - Status: Granted - Kind: B2 - Application number: 15/721,535 - Filed: 2017-09-29 - Published: 2019-04-04 - Granted: 2019-06-11 - Earliest claimed: 2017-09-29 - Assignees: Intel Corporation - Applicants: Intel Corporation - Inventors: Amit Kumar Srivastava - Web page: https://patentgrep.com/patent/US10320430B2 ## CPC - H04B 1/04: Circuits - G06F 1/305: {in the event of power-supply fluctuations} - G06F 13/4072: {Drivers or receivers (G06F13/4086 takes precedence; for multistate logic circuits H03K19/0002)} - H04B 1/1607: {Supply circuits (converters H02M; filters therefor H02M1/14; voltage stabilisers G05F1/46)} - H04B: TRANSMISSION - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract Described is an apparatus which comprises: a driver comprising a push-pull transmitter; a first circuitry to sense variation in a power supply; and a second circuitry coupled to the first circuitry and to the driver, the second circuitry to generate a code according to an output of the first circuitry, wherein the code is provided to the driver to adjust a performance parameter of the driver. ## Claims ### Claim 1 An apparatus comprising: a driver comprising a push-pull transmitter; a first circuitry to sense variation in a power supply; and a second circuitry coupled to the first circuitry and to the driver, wherein the second circuitry is to generate a code according to an output of the first circuitry, wherein the code is provided to the driver to adjust a performance parameter of the driver. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein the first circuitry comprises a ring oscillator including a delay stage, wherein the delay stage comprises devices of same size as those in the driver, and wherein the devices are connected to one another in a manner same as those in the driver. ### Claim 3 (depends on 2) The apparatus of claim 2 comprising a low pass filter coupled to the power supply, wherein an output of the low pass filter is a filtered power supply, which is to be provided to the ring oscillator as its power supply. ### Claim 4 (depends on 1) The apparatus of claim 1, wherein the output of the first circuitry is a first clock, and wherein the second circuitry comprises a digital comparator to compare the first clock with a second clock. ### Claim 5 (depends on 4) The apparatus of claim 4, wherein the second clock is generated by a crystal oscillator or an on-die clock. ### Claim 6 (depends on 4) The apparatus of claim 4, wherein the second circuitry comprises a filter coupled to an output of the comparator. ### Claim 7 (depends on 6) The apparatus of claim 6, wherein the filter comprises a shift-register chain. ### Claim 8 (depends on 6) The apparatus of claim 6, wherein the second circuitry comprises a finite state machine to generate the code according to an output of the filter. ### Claim 9 (depends on 1) The apparatus of claim 1, wherein the driver comprises a current mirror which includes a current source, and wherein strength of the current source is adjustable by the code. ### Claim 10 (depends on 1) The apparatus of claim 1, wherein the code is applied to the driver at boot-time, calibration time, during a time when a link is idle, or during an inter-packet gap. ### Claim 11 (depends on 1) The apparatus of claim 1, wherein the performance parameter is a voltage swing at an output of the driver. ### Claim 12 An apparatus comprising: a driver which is operable on two separate and different power supplies; a ring oscillator including at least three drivers, wherein an individual driver of the ring oscillator is a substantial replica of the driver, wherein the ring oscillator is to operate on a filtered version of one of the two separate and different power supplies; and circuitry to adjust a performance parameter of the driver according to an output of the ring oscillator. ### Claim 13 (depends on 12) The apparatus of claim 12, wherein the circuitry is to adjust the performance parameter of the driver at one or more of: boot-time, calibration time, during a time when a link is idle, or during an inter-packet gap. ### Claim 14 (depends on 12) The apparatus of claim 12, wherein the circuitry comprises: a comparator to compare an output of the ring oscillator with a reference clock; a filter coupled to the comparator, wherein the filter is to reduce noise in an output of the comparator; and a state machine coupled to an output of the filter, wherein the state machine is to generate a code which is to be received by the driver to adjust the performance parameter of the driver. ### Claim 15 (depends on 14) The apparatus of claim 14, wherein the filter comprises a shift-register chain. ### Claim 16 (depends on 14) The apparatus of claim 14, wherein the reference clock is generated by a crystal oscillator. ### Claim 17 (depends on 12) The apparatus of claim 12, wherein the driver is one of a USB, PCIe, or MIPI PHY compliant driver, and wherein the two power supplies include a power supply of 1 Volt and a power supply of 1.8 Volt. ### Claim 18 (depends on 12) The apparatus of claim 12, wherein the performance parameter is a voltage swing at an output of the driver. ### Claim 19 A system comprising: a memory; a processor coupled to the memory, the processor having a Universal Serial Bus (USB) compliant driver, which comprises a driver comprising a push-pull transmitter, wherein the processor includes: a first circuitry to sense variation in a power supply; and a second circuitry coupled to the first circuitry and to the driver, wherein the second circuitry is to generate a code according to an output of the first circuitry, wherein the code is provided to the driver to adjust a performance parameter of the driver; and a wireless interface to allow the processor to communicate with another device. ### Claim 20 (depends on 19) The system of claim 19, wherein the first circuitry comprises a ring oscillator including a delay stage, wherein the delay stage comprises devices of same size as those in the driver, and wherein the devices are connected to one another in a manner same as those in the driver. ### Claim 21 (depends on 20) The system of claim 20, wherein the processor comprises a low pass filter coupled to the power supply, wherein an output of the low pass filter is a filtered power supply which is provided to the ring oscillator as its power supply. ### Claim 22 (depends on 19) The system of claim 19, wherein the code is applied to the driver at one or more of: boot-time, calibration time, during a time when a link is idle, or during an inter-packet gap.