# US 10,320,411 B1 · High accuracy phase shift apparatus

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- Number: US 10,320,411 B1
- Document ID: US10320411B1
- Status: Granted
- Kind: B1
- Application number: 16/015,127
- Filed: 2018-06-21
- Granted: 2019-06-11
- Earliest claimed: 2018-04-27
- Assignees: Chengdu Sicore Semiconductor Corp. Ltd.
- Applicants: Chengdu Sicore Semiconductor Corp. Ltd.
- Inventors: Cemin Zhang
- Web page: https://patentgrep.com/patent/US10320411B1

## CPC

- H03M 1/66: Digital/analogue converters ({H03M1/001 – } H03M1/10 take precedence)
- G05B 19/042: using digital processors (G05B19/05 takes precedence)
- H03H 7/20: Two-port phase shifters providing an adjustable phase shift
- H03H 7/54: Modifications of networks to reduce influence of variations of temperature
- H03H 17/08: Networks for phase shifting
- H03M 1/0614: {of harmonic distortion (H03M1/0617 takes precedence)}
- H03D 3/00: Demodulation of angle-, {frequency- or phase-} modulated oscillations (H03D5/00, H03D9/00, H03D11/00 take precedence)
- H03H 2210/036: Stepwise
- H03M 1/12: Analogue/digital converters ({H03M1/001 – } H03M1/10 take precedence)
- H03M 1/68: with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits
- H04B 1/0003: {Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain (digital baseband systems H04L25/00; digital modulation/demodulation H04L27/00; CDMA H04B1/707; TDMA H04B7/2643; image transmission H04N5/00)}
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)
- G05B: CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS (systems for controlling or regulating non-electric variables G05D; systems for regulating electric or magnetic variables G05F; control devices or systems insofar as characterised by mechanical features only G05G)
- H03H: IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS (waveguides, resonators, lines or other devices of the waveguide type H01P)
- H03D: DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER (masers, lasers H01S; circuits capable of acting both as modulator and demodulator H03C; details applicable to both modulators and frequency-changers H03C; demodulating pulses H03K9/00; transforming types of pulse modulation H03K11/00; coding, decoding or code conversion, in general H03M; repeater stations H04B7/14; demodulators adapted for AC systems of digital information transmission H04L27/00; synchronous demodulators adapted for colour television H04N9/66)
- H04B: TRANSMISSION

## Abstract

Various embodiments of the invention relate to a high accuracy phase shift apparatus. The phase shift apparatus comprises a voltage controlled analog phase shifter, a microcontroller unit (MCU) and a digital-to-analog converter (DAC). The MCU generates a digital control signal, which is converted into an analog control signal by the DAC to control the voltage controlled analog phase shifter to achieve desired phase shift angle. The phase shift apparatus may further incorporate a temperature sensor for temperature compensation. The output from the temperature sensor may be used to modify the reference voltage of the DAC, or alternatively be used to modify the digital control signal from the MCU. By incorporation digitalized control and temperature compensation to an analog phase shifter, the disclosed phase shift apparatus achieves high accuracy digitalized control, a flat phase shift over a wide bandwidth, and a stable phase shift over temperature variation.

## Claims

### Claim 1

A phase shift apparatus comprising:
a microcontroller unit (MCU) to output a digital control signal corresponding to a desired phase shift, the digital control signal comprising a plurality of binary bits;
a temperature sensor generating an output voltage indicating ambient temperature;
a mixer coupled to receive the output voltage and a first reference voltage to output a modified reference voltage;
a first digital-to-analog converter (DAC) coupled to the MCU and the mixer, the first DAC receives one or more bits from the digital control signal and outputs a first control voltage based at least on the received one or more bits and the modified reference voltage, the modified reference voltage corresponds to a maximum voltage output of the first DAC; and
a first voltage controlled analog phase shifter (APS) receiving a radio frequency (RF) input signal via an RF input port and the first control voltage, the first APS outputs via an RF output port a first RF output signal with the desired phase shift angle with reference to the RF input signal under the control of the first control voltage.

### Claim 2 (depends on 1)

The phase shift apparatus of claim 1 further comprising a memory incorporated within the MCU or accessible by the MCU, the memory is preloaded with a lookup table that relates each one of a plurality of phase shift angles to a specific state of the digital control signal.

### Claim 3 (depends on 2)

The phase shift apparatus of claim 2, wherein the MCU retrieves a desired state from the lookup table corresponding to the desired phase shift and generates the digital control signal with the desired state.

### Claim 4 (depends on 1)

The phase shift apparatus of claim 1 wherein the mixer implements an addition or subtraction of the output voltage to the reference voltage to generate the modified reference voltage, the output voltage is weighted for the addition or subtraction implementation.

### Claim 5 (depends on 1)

The phase shift apparatus of claim 1 further comprising:
a second DAC coupled to the MCU, the second DAC receives one or more bits from the digital control signal and a second reference voltage to output a second control voltage, the one or more bits received by the second DAC are different bits from the one or more bits received by the first DAC; and
a second voltage controlled APS coupled to the first voltage controlled APS in series, the second voltage controlled APS receives the second control voltage and the first RF output signal from the first voltage controlled APS, the second APS generates a second RF output signal with a desired phase shift angle with reference to the first RF output signal under the control of the second control voltage.

### Claim 6 (depends on 5)

The phase shift apparatus of claim 5 wherein the second reference voltage is not temperature compensated.

### Claim 7 (depends on 5)

The phase shift apparatus of claim 5 wherein the first DAC and the first APS are for fine phase shift tuning of the phase shift apparatus, the second DAC and the second APS are for coarse phase shift tuning of the phase shift apparatus.

### Claim 8 (depends on 1)

The phase shift apparatus of claim 1 wherein the RF input port and RF output port of APS are interchangeable.

### Claim 9

A phase shift apparatus comprising:
a microcontroller unit (MCU) to output a digital control signal, the digital control signal comprising a plurality of binary bits;
a first digital-to-analog converter (DAC) coupled to the MCU, the first DAC receives one or more bits from the digital control signal and a first reference voltage to output a first control voltage based at least on the received one or more bits and the first reference voltage, the first reference voltage corresponds to a maximum voltage output of the first DAC;
a first voltage controlled analog phase shifter (APS) receiving a radio frequency (RF) input signal via an RF input port and the first control voltage, the first APS outputs via an RF output port a first RF output signal with a first phase shift angle with reference to the RF input signal under the control of the first control voltage;
a second DAC coupled to the MCU, the second DAC receives one or more bits from the digital control signal and a second reference voltage to output a second control voltage, the second reference voltage corresponds to a maximum voltage output of the second DAC, the one or more bits received by the second DAC are different bits from the one or more bits received by the first DAC; and
a second voltage controlled APS coupled to the first voltage controlled APS in series, the second voltage controlled APS receives the second control voltage and the first RF output signal from the first voltage controlled APS, the second APS generates a second RF output signal at a second RF output port with a second desired phase shift angle with reference to the first RF output signal under the control of the second control voltage.

### Claim 10 (depends on 9)

The phase shift apparatus of claim 9 wherein the one or more bits received by the first DAC are least significant bits (LSBs) of the digital control signal, the one or more bits received by the second DAC are most significant bits (MSBs) of the digital control signal.

### Claim 11 (depends on 9)

The phase shift apparatus of claim 9 wherein the first DAC and the first APS are for fine phase shift tuning of the phase shift apparatus, the second DAC and the second APS are for coarse phase shift tuning of the phase shift apparatus.

### Claim 12 (depends on 11)

The phase shift apparatus of claim 11 wherein the first reference voltage is temperature compensated, the second reference voltage is not temperature compensated.

### Claim 13 (depends on 9)

The phase shift apparatus of claim 9 wherein the first RF input port and the second RF output port are interchangeable.

### Claim 14

A phase shift apparatus comprising:
a temperature sensor generating an output voltage indicating ambient temperature;
an analog-to-digital converter (ADC) generating a digitalized temperature based on the output voltage from the temperature sensor;
a microcontroller unit (MCU) generating an adjusted digital control signal based on the digitalized temperature signal and a digital control signal state retrieved from a lookup table in correspondence to a desired phase shift angle;
a digital-to-analog converter (DAC) generating a temperature compensated control voltage based on the adjusted digital control signal and a reference voltage; and
a voltage controlled analog phase shifter (APS) receiving a radio frequency (RF) input signal and the control voltage, the APS generates an RF output signal with the desired phase shift angle with reference to the RF input signal under the control of the temperature compensated control voltage.

### Claim 15 (depends on 14)

The phase shift apparatus of claim 14 wherein the lookup table is stored in a memory incorporated within the MCU or accessible by the MCU, the lookup table relates each one of a plurality of phase shift angles to a specific state of the digital control signal.

### Claim 16 (depends on 15)

The phase shift apparatus of claim 15 wherein the lookup table is created during a test stage of the voltage controlled APS.

### Claim 17 (depends on 16)

The phase shift apparatus of claim 16 wherein the test stage may comprise tests performed at various control voltages under one or more frequencies.

### Claim 18 (depends on 16)

The phase shift apparatus of claim 16 wherein the test stage may comprise tests performed at various control voltages under one or more temperatures.

### Claim 19 (depends on 14)

The phase shift apparatus of claim 14 wherein the reference voltage corresponds to a maximum voltage output of the DAC, the reference voltage is capable to control the APS to generate a phase shift for 360 degree or more.

### Claim 20 (depends on 14)

The phase shift apparatus of claim 14 where the RF input and RF output of APS are interchangeable.