# US 10,320,392 B2 · Apparatus and method for a permutation sequencer

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- Number: US 10,320,392 B2
- Document ID: US10320392B2
- Status: Granted
- Kind: B2
- Application number: 16/053,240
- Filed: 2018-08-02
- Published: 2019-03-21
- Granted: 2019-06-11
- Earliest claimed: 2017-09-18
- Assignees: QUALCOMM Incorporated
- Applicants: QUALCOMM Incorporated
- Inventors: Kelly Wong Hagen
- Web page: https://patentgrep.com/patent/US10320392B2

## CPC

- H03K 19/17752: for hot reconfiguration
- G06F 1/26: Power supply means, e.g. regulation thereof (for memories G11C)
- H03K 19/0016: {by using a control or a clock signal, e.g. in order to apply power supply}
- H03K 19/17728: Reconfigurable logic blocks, e.g. lookup tables
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Aspects of the disclosure are directed to sequencing. In accordance with one aspect, sequencing includes creating a one hot list; selecting a current word of the one hot list as a one hot list output; comparing the one hot list output with a current accumulation register value of an accumulation register to produce a logical comparison; inputting the logical comparison to the accumulation register to generate an updated accumulation register value; and outputting the updated accumulated register state to a client unit to enable or disable the client unit.

## Claims

### Claim 1

A permutation sequencer comprising
a one hot list, the one hot list including a one hot list output;
an XOR logic coupled to the one hot list, the XOR logic including a first XOR input and a second XOR input;
an accumulation register coupled to the XOR logic, the accumulation register including an accumulation register output;
a read pointer to address the one hot list; and
a power good register coupled to the accumulation register, the power good register to implement a single bit interface to the accumulation register; wherein the one hot list output is coupled to the first XOR input and the accumulation register output is coupled to the second XOR input.

### Claim 2 (depends on 1)

The permutation sequencer of claim 1, wherein the power good register stores an abstracted representation of actual client unit enable status of one or more client units.

### Claim 3 (depends on 1)

The permutation sequencer of claim 1, wherein a content of the accumulation register and a content of the power good register are compared to generate an acknowledgement or a confirmation of an actual sequence state of one or more client units.

### Claim 4 (depends on 3)

The permutation sequencer of claim 3, wherein the power good register is a mock register.

### Claim 5 (depends on 3)

The permutation sequencer of claim 3, further comprising a logic module coupled to the power good register.

### Claim 6 (depends on 5)

The permutation sequencer of claim 5, wherein the logic module generates a bit sequence to input to the power good register.

### Claim 7 (depends on 6)

The permutation sequencer of claim 6, wherein the bit sequence represents the actual sequence state of the one or more client units.

### Claim 8 (depends on 1)

The permutation sequencer of claim 1, wherein the accumulation register output is coupled to one or more client units and wherein a quantity of the one or more client units is N quantity and the one hot list includes N quantity of words with each of the N quantity of words having a word length equal to N bits.

### Claim 9 (depends on 1)

The permutation sequencer of claim 1, wherein the accumulation register output is coupled to one or more client units and wherein the one hot list comprises a one hot encoded list.

### Claim 10 (depends on 9)

The permutation sequencer of claim 9 wherein the quantity of the one or more client units is N quantity and the one hot encoded list includes N quantity of encoded words with each encoded word of the N quantity of encoded words having a word length of less than N bits.

### Claim 11 (depends on 10)

The permutation sequencer of claim 10, wherein the each encoded word of the N quantity of encoded words is encoded with binary encoding to reduce the number of bits per encoded word.