# US 10,320,367 B2 · Method for synchronizing commutated control circuits controlled by PWM control signals > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,320,367 B2 - Document ID: US10320367B2 - Status: Granted - Kind: B2 - Application number: 15/568,711 - Filed: 2016-04-21 - Published: 2018-06-14 - Granted: 2019-06-11 - Earliest claimed: 2015-04-24 - Assignees: Continental Automotive France; Continental Automotive GmbH - Applicants: Continental Automotive France; Continental Automotive GmbH - Inventors: Angelo Pasqualetto - Web page: https://patentgrep.com/patent/US10320367B2 ## CPC - H03K 3/02332: {of the primary-secondary type} - H02M 1/44: Circuits or arrangements for compensating for electromagnetic interference in converters or inverters - H02M 7/537: using semiconductor devices only, e.g. single switched pulse inverters - H03K 5/15: Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors (distributing, switching or gating arrangements H03K17/00) - H03K 17/165: {by feedback from the output circuit to the control circuit} - H02M 1/008: {Plural converter units for generating at two or more independent and non-parallel outputs, e.g. systems with plural point of load switching regulators} - H02M 7/5387: in a bridge configuration - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) ## Abstract Disclosed is a method for synchronising at least one slave control circuit, controlled by a slave control signal having pulse width modulation, with a master control circuit, controlled by a master control signal having pulse width modulation, including the following steps: the master control circuit emitting a synchronisation signal indicating a master edge of an electrical quantity; the slave control circuit receiving the synchronisation signal; measuring a delay between a slave edge of the same electrical quantity and the master edge of the electrical quantity; time-shifting the slave control signal so as to reduce the delay; and repeating the measurement step until the delay is eliminated. ## Claims ### Claim 1 A method for synchronizing at least one slave control circuit (1S), of switched type, controlled by a slave control signal (2S) having pulse width modulation exhibiting a slave period (3S) and controlling a slave load (4S), with a master control circuit (1M), of switched type, controlled by a master control signal (2M) having pulse width modulation exhibiting a master period (3M) and controlling a master load (4M), the method comprising the following steps: the master control circuit (1M) transmitting a synchronization signal (5) that is indicative of a master edge (67M, 68M) of an electrical quantity (7M, 8M) of the master circuit (1M); the slave control circuit (1S) receiving the synchronization signal (5); repeatedly measuring an interval (9SM) between a slave edge (67S, 68S) of the same electrical quantity (7S, 8S) of the slave circuit (1S) and the master edge (67M, 68M) of the electrical quantity (7M, 8M) of the master circuit (1M) as indicated by the synchronization signal (5), and time-shifting (92E, 92T) the slave control signal (2S) in a manner that decreases the measured interval (9SM), until said interval (9SM) is canceled out, wherein the direction of the master edge (67M, 68M) and the direction of the one or more slave edges (67S, 68S) of the measurement step are opposite. ### Claim 2 (depends on 1) The method as claimed in claim 1, further comprising: prior to the measurement step, initially delaying the master control signal (2M) so as to create a synchronization margin (13). ### Claim 3 (depends on 1) The method as claimed in claim 1, wherein the slave period (3S) is equal to the master period (3M). ### Claim 4 (depends on 1) The method as claimed in claim 1, wherein the electrical quantity (7, 8) is the current (7) flowing through the control circuit. ### Claim 5 (depends on 1) The method as claimed in claim 1, wherein the electrical quantity (7, 8) is the voltage (8) across the terminals of the load (4). ### Claim 6 (depends on 1) The method as claimed in claim 1, wherein the master edge (67M, 68M) and the one or more slave edges (67S, 68S) of the measurement step are chosen from among periodic edges. ### Claim 7 (depends on 1) The method as claimed in claim 1, further comprising: configuring the master control signal (2M) according to a first logic, with a choice of a high level (11M) at the start of a period (3M) or a high level (11M) at the end of a period (3M); and configuring the one or more slave control signals (2S) according to a second logic, different from the first logic. ### Claim 8 (depends on 1) The method as claimed in claim 1, wherein the master load (4M) is at least inductive. ### Claim 9 (depends on 1) The method as claimed in claim 1, wherein the one or more slave loads (4S) are at least inductive. ### Claim 10 (depends on 1) An electronic component for synchronizing at least one slave control circuit (1S), of switched type, controlled by a slave control signal (2S) having pulse width modulation exhibiting a slave period (3S) and controlling a slave load (4S), with a master control circuit (1M), of switched type, controlled by a master control signal (2M) having pulse width modulation exhibiting a master period (3M) and controlling a master load (4M), implementing the method as claimed in claim 1, comprising: means for the master control circuit (1M) to transmit a synchronization signal (5) that is indicative of a master edge (67M, 68M) of an electrical quantity (7M, 8M) of the master circuit (1M); means for the slave control circuit (1S) to receive the synchronization signal (5); means for measuring an interval (9SM) between a slave edge (67S, 68S) of the same electrical quantity (7S, 8S) of the slave circuit (1S) and the master edge (67M, 68M) of the electrical quantity (7M, 8M) of the master circuit (1M) as indicated by the synchronization signal (5); means for time-shifting (92E, 92T) the slave control signal (2S) so as to decrease said interval (9SM). ### Claim 11 (depends on 10) The electronic component as claimed in claim 10, further comprising: at least one master control circuit (1M) and at least one slave control circuit (1S), positioned within one and the same housing. ### Claim 12 (depends on 2) The method as claimed in claim 2, wherein the slave period (3S) is equal to the master period (3M). ### Claim 13 (depends on 2) The method as claimed in claim 2, wherein the electrical quantity (7, 8) is the current (7) flowing through the control circuit. ### Claim 14 (depends on 3) The method as claimed in claim 3, wherein the electrical quantity (7, 8) is the current (7) flowing through the control circuit. ### Claim 15 (depends on 2) The method as claimed in claim 2, wherein the electrical quantity (7, 8) is the voltage (8) across the terminals of the load (4). ### Claim 16 (depends on 3) The method as claimed in claim 3, wherein the electrical quantity (7, 8) is the voltage (8) across the terminals of the load (4). ### Claim 17 (depends on 2) The method as claimed in claim 2, wherein the master edge (67M, 68M) and the one or more slave edges (67S, 68S) of the measurement step are chosen from among periodic edges. ### Claim 18 (depends on 3) The method as claimed in claim 3, wherein the master edge (67M, 68M) and the one or more slave edges (67S, 68S) of the measurement step are chosen from among periodic edges. ### Claim 19 (depends on 4) The method as claimed in claim 4, wherein the master edge (67M, 68M) and the one or more slave edges (67S, 68S) of the measurement step are chosen from among periodic edges.