# US 10,319,859 B2 · Semiconductor devices and methods of fabricating the same

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- Number: US 10,319,859 B2
- Document ID: US10319859B2
- Status: Granted
- Kind: B2
- Application number: 15/844,863
- Filed: 2017-12-18
- Published: 2018-04-19
- Granted: 2019-06-11
- Earliest claimed: 2015-05-26
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Sujin Jung; JinBum Kim; Kang Hun Moon; Kwan Heum Lee; Byeongchan Lee; Choeun Lee; Yang Xu
- Web page: https://patentgrep.com/patent/US10319859B2

## CPC

- H10D 30/6211: {having fin-shaped semiconductor bodies integral with the bulk semiconductor substrates}
- H10D 30/024: {of fin field-effect transistors [FinFET]}
- H10D 30/797: {being in source or drain regions, e.g. SiGe source or drain}
- H10D 62/151: {of IGFETs (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713)}
- H10D 84/0158: {the components including FinFETs}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A semiconductor device is disclosed. The device includes a substrate including an active region defined by a device isolation layer, a fin pattern protruding from the substrate and extending in a first direction, the fin pattern including a gate fin region and a source/drain fin region, a gate pattern disposed on the gate fin region to extend in a second direction crossing the first direction, and a source/drain portion provided on a sidewall of the source/drain fin region. When measured in the second direction, a width of the source/drain fin region is different from a width in the second direction of the gate fin region.

## Claims

### Claim 1

A method of fabricating a semiconductor device, comprising:
forming a fin pattern defined by a device isolation layer on a substrate, the fin pattern comprising a gate fin region and a source/drain fin region;
forming a sacrificial pattern covering the gate fin region, the sacrificial pattern exposing the source/drain fin region; and
performing a trimming process on the source/drain fin region selectively to reduce a width of the source/drain fin region,
wherein the fin pattern extends in a first direction, and
wherein, when measured in a second direction crossing the first direction, the width of the source/drain fin region at a height is different from a width of the gate fin region at the height.

### Claim 2 (depends on 1)

The method of claim 1, wherein the width of the source/drain fin region at the height is less than the width of the gate fin region at the height.

### Claim 3 (depends on 1)

The method of claim 1, wherein the width of the source/drain fin region becomes gradually wider toward the substrate.

### Claim 4 (depends on 1)

The method of claim 1, wherein the source/drain fin region has a lower portion and an upper portion,
wherein the upper portion is disposed at a level higher than the lower portion, and
wherein the lower portion has a width that increases toward the substrate at a ratio different from the upper portion.

### Claim 5 (depends on 1)

The method of claim 1, wherein the source/drain fin region has a lower portion and an upper portion,
wherein the upper portion is disposed at a level higher than the lower portion, and
wherein the lower portion has a width that increases toward the substrate at a higher change rate than the upper portion.

### Claim 6 (depends on 1)

The method of claim 1, wherein the source/drain fin region is formed to have a concave sidewall.

### Claim 7 (depends on 1)

The method of claim 1, wherein the source/drain fin region comprises a portion having a width the same as the width of the gate fin region.

### Claim 8 (depends on 1)

The method of claim 1, further comprising:
an active region below the source/drain fin region,
wherein the source/drain fin region comprises a portion having the same width as the width of the active region.

### Claim 9

A method of fabricating a semiconductor device, comprising:
forming an insulating layer in a substrate;
etching an upper portion of the insulating layer to form a fin pattern comprising a gate fin region and a source/drain fin region;
forming a sacrificial pattern on the gate fin region, the sacrificial pattern exposing the source/drain fin region; and
performing a trimming process on the source/drain fin region selectively to reduce a width of the source/drain fin region,
wherein the fin pattern extends in a first direction, and
wherein, when measured in a second direction crossing the first direction, the width of the source/drain fin region at a height is different from a width of the gate fin region at the height.

### Claim 10 (depends on 9)

The method of claim 9, wherein the trimming process comprises a wet etching process or a cleaning process.

### Claim 11 (depends on 10)

The method of claim 10, wherein the source/drain fin region is formed to have a concave sidewall by performing the wet etching process or the cleaning process.

### Claim 12 (depends on 9)

The method of claim 9, wherein a lower portion of the source/drain fin region has a width that increases toward the substrate at a higher change rate than an upper portion of the source/drain fin region.

### Claim 13 (depends on 9)

The method of claim 9, wherein the trimming process comprises a dry etching process.

### Claim 14 (depends on 9)

The method of claim 9, further comprising:
before performing the trimming process, forming spacers on opposite sidewalls of the sacrificial pattern, respectively.

### Claim 15 (depends on 9)

The method of claim 9, further comprising:
forming a source/drain portion using an epitaxial growth process, in which the source/drain fin region is used as a seed layer.

### Claim 16

A method of fabricating a semiconductor device, comprising:
forming a fin pattern defined by a device isolation layer on a substrate;
forming a sacrificial pattern covering a first portion of the fin pattern, the sacrificial pattern exposing a second portion of the fin pattern; and
performing a trimming process on the second portion of the fin pattern selectively to form a source/drain fin region, the source/drain fin region formed to have a concave sidewall, wherein the fin pattern extends in a first direction,
wherein, when measured in a second direction crossing the first direction, a width of the source/drain fin region at a height is different from a width of the first portion of the fin pattern at the height.

### Claim 17 (depends on 16)

The method of claim 16, wherein the concave sidewall has at least two portions having slopes different from each other.

### Claim 18 (depends on 16)

The method of claim 16, wherein the concave sidewall has an upper sidewall and a lower sidewall,
wherein the lower sidewall is disposed at a low level than the upper sidewall,
wherein a slope of the upper sidewall is larger than a slope of the lower sidewall, and
wherein the slopes are with respect to an upper surface of the substrate.

### Claim 19 (depends on 16)

The method of claim 16, wherein the width of the source/drain fin region becomes gradually wider toward the substrate.

### Claim 20 (depends on 16)

The method of claim 16, wherein the source/drain fin region has a lower portion and an upper portion,
wherein the upper portion is disposed at a level higher than the lower portion, and wherein the lower portion has a width that increases toward the substrate at a higher change rate than the upper portion.