# US 10,319,826 B2 · Replacement metal gate stack with oxygen and nitrogen scavenging layers

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- Number: US 10,319,826 B2
- Document ID: US10319826B2
- Status: Granted
- Kind: B2
- Application number: 15/485,727
- Filed: 2017-04-12
- Published: 2018-10-18
- Granted: 2019-06-11
- Earliest claimed: 2017-04-12
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Takashi Ando; Pouya Hashemi; Choonghyun Lee
- Web page: https://patentgrep.com/patent/US10319826B2

## CPC

- H10D 64/667: {the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers (having lateral variation H10D64/671)}
- H10D 30/60: Insulated-gate field-effect transistors [IGFET] (H10D30/40 takes precedence)
- H10D 64/01318: {the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN (comprising a layer of alloys of Si, Ge or C H10D64/01314)}
- H10D 64/017: {using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes}
- H10D 64/669: {the conductor further comprising additional layers of alloy material, compound material or organic material, e.g. TaN/TiAlN}
- H10D 64/691: {comprising metallic compounds, e.g. metal oxides or metal silicates (insulators comprising nitrogen H10D64/693)}
- H10D 64/685: {being perpendicular to the channel plane}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A method is presented for tuning work functions of transistors. The method includes forming a high-k dielectric over a semiconductor substrate, and forming a work function stack over the high-k dielectric, the work function stack including a first layer having a nitrogen (N) scavenging element, a second layer having an oxygen (O) scavenging element, and a third layer being a conducting layer.

## Claims

### Claim 1

A method for tuning a work function of a transistor having a dummy gate structure between a set of spacers, the method comprising:
forming a high-k dielectric over a semiconductor substrate;
removing the dummy gate structure to define a recess; and
forming a three-layer work function stack within the recess, the three-layer work function stack within the recess including a first layer having a nitrogen (N) scavenging element, a second layer having an oxygen (O) scavenging element, and a third layer being a conducting layer, where the first, second, and third layers are constructed to include a common metal;
wherein the first layer is a tantalum (Ta) doped metal nitride layer, the second layer is a titanium aluminum (TiAl) layer, and the third layer is a TiN layer.

### Claim 2 (depends on 1)

The method of claim 1, wherein the nitrogen (N) scavenging element is tantalum (Ta).

### Claim 3 (depends on 1)

The method of claim 1, wherein the oxygen (O) scavenging element is aluminum (Al).

### Claim 4 (depends on 1)

The method of claim 1, further comprising forming source/drain regions within the semiconductor substrate.

### Claim 5 (depends on 1)

The method of claim 1, wherein the first layer is a tantalum (Ta) doped metal nitride layer, the second layer is a titanium aluminum carbon (TiAlC) layer, and the third layer is a TiN layer.

### Claim 6 (depends on 1)

The method of claim 1, wherein the third layer is a titanium nitride (TiN) layer.

### Claim 7 (depends on 1)

The method of claim 1, wherein the third layer is a titanium tantalum nitride layer (TiTaN).

### Claim 8 (depends on 1)

The method of claim 1, wherein a concentration of the nitrogen (N) scavenging element of the first layer is tuned by changing a cycle ratio.

### Claim 9 (depends on 1)

The method of claim 1, wherein the first layer prevents any type of oxygen (O) scavenging to occur.

### Claim 10

A structure for tuning a work function of a transistor having a dummy gate structure between a set of spacers, the structure comprising:
a high-k dielectric formed over a semiconductor substrate; and
a three-layer work function stack formed within a recess defined after removing the dummy gate structure, the three-layer work function stack within the recess including a first layer having a nitrogen (N) scavenging element, a second layer having an oxygen (O) scavenging element, and a third layer being a conducting layer, where the first, second, and third layers are constructed to include a common metal;
wherein the first layer is a tantalum (Ta) doped metal nitride layer, the second layer is a titanium aluminum (TiAl) layer, and the third layer is a TiN layer.

### Claim 11 (depends on 10)

The structure of claim 10, wherein the nitrogen (N) scavenging element is tantalum (Ta).

### Claim 12 (depends on 10)

The structure of claim 10, wherein the oxygen (O) scavenging element is aluminum (Al).

### Claim 13 (depends on 10)

The structure of claim 10, wherein source/drain regions are formed within the semiconductor substrate.

### Claim 14 (depends on 10)

The structure of claim 10, wherein the first layer is a tantalum (Ta) doped metal nitride layer, the second layer is a titanium aluminum carbon (TiAlC) layer, and the third layer is a TiN layer.

### Claim 15 (depends on 10)

The structure of claim 10, wherein the third layer is a titanium nitride (TiN) layer.

### Claim 16 (depends on 10)

The structure of claim 10, wherein the third layer is a titanium tantalum nitride layer (TiTaN).

### Claim 17 (depends on 10)

The structure of claim 10, wherein a concentration of the nitrogen (N) scavenging element of the first layer is tuned by changing a cycle ratio.

### Claim 18 (depends on 10)

The structure of claim 10, wherein the first layer prevents any type of oxygen (O) scavenging to occur.

### Claim 19

A method for tuning a work function of a transistor having a dummy gate structure between a set of spacers, the method comprising:
forming source/drain regions within a semiconductor substrate;
forming a high-k dielectric over the semiconductor substrate;
removing the dummy gate structure to define a recess; and
forming a three-layer work function stack within the recess, the three-layer work function stack within the recess including a first layer having a nitrogen (N) scavenging element, a second layer having an oxygen (O) scavenging element, and a third layer being a conducting layer, where the first, second, and third layers are constructed to include a common metal;
wherein the first layer is a tantalum (Ta) doped metal nitride layer, the second layer is a titanium aluminum (TiAl) layer, and the third layer is a TiN layer.

### Claim 20 (depends on 19)

The method of claim 19, wherein the first layer prevents any type of oxygen (O) scavenging to occur.