# US 10,319,804 B2 · Active matrix organic light-emitting-diode display backboard and manufacturing method thereof, display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,319,804 B2 - Document ID: US10319804B2 - Status: Granted - Kind: B2 - Application number: 15/396,963 - Filed: 2017-01-03 - Published: 2017-04-27 - Granted: 2019-06-11 - Earliest claimed: 2013-10-28 - Assignees: Boe Technology Group Co., Ltd. - Applicants: Boe Technology Group Co., Ltd. - Inventors: Ying Wang - Web page: https://patentgrep.com/patent/US10319804B2 ## CPC - H10K 59/1315: {comprising structures specially adapted for lowering the resistance} - H10K 59/1216: {the pixel elements being capacitors} - H10K 59/131: Interconnections, e.g. wiring lines or terminals - H10K 59/35: comprising red-green-blue [RGB] subpixels - H10K 59/1201: {Manufacture or treatment} - H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES ## Abstract An AMOLED display backboard, a display device and a manufacturing method of an AMOLED display backboard are provided. In the AMOLED display backboard, the number of VDD lines (601) is less than that of sub-pixels in one row, thus reducing area occupied by the VDD lines (601), lessening occupation of VDD lines (601) on the area of circuit board, while realizing connection of circuit input terminals (603) of respective sub-pixels and VDD lines (601) by the VDD connecting line (602). ## Claims ### Claim 1 An active matrix organic light-emitting-diode (AMOLED) display backboard, comprising: a pixel unit array, wherein each pixel unit comprises N sub-pixels and defined by gate lines and data lines; power source signal lines (VDD) in a number less than that of sub-pixels n×N in one row, and; at least one VDD connecting line intersected or non-coplanarly intersected with the VDD lines; wherein the VDD connecting line other than the gate lines is configured to connect circuit input terminals of respective sub-pixels and VDD lines; and the VDD connecting line and the gate electrode are formed from a same gate layer which forms part of a subpixel capacitor. ### Claim 2 (depends on 1) The display backboard according to claim 1, wherein the VDD lines have a width N times greater than that of the data lines, where N is a positive integer larger than or equal to 2. ### Claim 3 (depends on 2) The display backboard according to claim 2, wherein the width of each VDD line is about 8 μm. ### Claim 4 A manufacturing method of an active matrix organic light-emitting-diode (AMOLED) display backboard comprises: forming a gate layer on a substrate, forming a gate layer pattern including the gate electrode and a connecting line of the power source signal (VDD) lines by a pattern process; forming an active layer on the gate layer; and forming a source-drain layer on the active layer, forming gate lines, data lines, the VDD lines, connecting lines of sub-pixel electrodes, and via holes over the source-drain layer; wherein the gate lines and data lines are intersected with each other to define pixel units including sub-pixels, the VDD connecting line other than the gate lines is connected with respective VDD lines, and connecting lines of the sub-pixel electrodes through the via holes, respectively. ### Claim 5 (depends on 4) The manufacturing method of an AMOLED display backboard according to claim 4, wherein each pixel unit includes N sub-pixels, and the VDD lines is in a number less than that of n×N sub-pixels in one row of the sub-pixel units. ### Claim 6 (depends on 4) The manufacturing method of an AMOLED display backboard according to claim 4, wherein VDD lines formed in each pixel unit are in a number less than or equal to N−1. ### Claim 7 (depends on 6) The manufacturing method of an AMOLED display backboard according to claim 6, wherein the number of VDD lines included in each pixel units is less than 3. ### Claim 8 (depends on 6) The manufacturing method of an AMOLED display backboard according to claim 6, wherein each pixel unit includes one VDD line. ### Claim 9 (depends on 4) The manufacturing method of an AMOLED display backboard according to claim 4, wherein the VDD lines have a width greater than that of the data lines. ### Claim 10 (depends on 9) The manufacturing method of an AMOLED display backboard according to claim 9, wherein the width of the VDD lines is N times greater than that of the data lines. ### Claim 11 (depends on 9) The manufacturing method of an AMOLED display backboard according to claim 9, wherein the width of the VDD lines is 3 times greater than that of data lines. ### Claim 12 (depends on 4) The manufacturing method of an AMOLED display backboard according to claim 4, wherein the VDD connecting line is substantially perpendicular to the VDD lines. ### Claim 13 (depends on 4) The manufacturing method of an AMOLED display backboard according to claim 4, further comprising: forming a poly-silicon layer; wherein the VDD connecting line and the poly-silicon layer form a sub-pixel capacitor. ### Claim 14 (depends on 4) The manufacturing method of an AMOLED display backboard according to claim 4, further comprising, forming a buffer layer, a gate insulating layer and a planarization layer on the substrate. ### Claim 15 (depends on 4) The manufacturing method according to claim 4, wherein the AMOLED display board comprises: a pixel unit array, wherein each pixel unit comprises N sub-pixels and defined by the gate lines and the data lines; power source signal lines (VDD) in a number less than that of sub-pixels nxN in one row, and; at least one VDD connecting line intersected or non-coplanarly intersected with the VDD lines; wherein the VDD connecting line other than the gate lines is configured to connect circuit input terminals of respective sub-pixels and VDD lines; and the VDD connecting line and the gate electrode are formed from a same gate layer which forms part of a subpixel capacitor. ### Claim 16 (depends on 15) The manufacturing method according to claim 15, wherein the VDD lines have a width N times greater than that of the data lines, where N is a positive integer larger than or equal to 2. ### Claim 17 (depends on 15) The manufacturing method according to claim 15, wherein the width of each VDD line is about 8 μm.