# US 10,319,775 B2 · Semiconductor device, solid-state imaging device with tantalum oxide layer formed by diffusing a material of an electrode of necessity or a counter electrode

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- Number: US 10,319,775 B2
- Document ID: US10319775B2
- Status: Granted
- Kind: B2
- Application number: 15/918,103
- Filed: 2018-03-12
- Published: 2018-07-19
- Granted: 2019-06-11
- Earliest claimed: 2012-09-28
- Assignees: Sony Corporation
- Applicants: Sony Corporation
- Inventors: Takashi Yokoyama
- Web page: https://patentgrep.com/patent/US10319775B2

## CPC

- H10F 39/811: {Interconnections}
- H10F 39/014: {of CMOS image sensors}
- H10F 39/018: {of hybrid image sensors}
- H10F 39/026: {Wafer-level processing}
- H10F 39/18: Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
- H10F 39/199: {Back-illuminated image sensors}
- H10F 39/802: {Geometry or disposition of elements in pixels, e.g. address-lines or gate electrodes}
- H10F 39/8037: {the integrated elements comprising a transistor}
- H10F 39/80373: {characterised by the gate of the transistor}
- H10F 39/809: {of hybrid image sensors}
- H10F 71/00: Manufacture or treatment of devices covered by this subclass (patterning processes to connect thin photovoltaic cells in integrated devices, or assemblies of multiple devices, having photovoltaic cells H10F19/33; manufacture or treatment of encapsulations or containers for integrated devices, or assemblies of multiple devices, having photovoltaic cells H10F19/80; manufacture or treatment of integrated devices, or assemblies of multiple devices, comprising at least one element in which radiation controls the flow of current H10F39/00)
- H10F 77/122: comprising only Group IV materials
- H10F 77/20: Electrodes
- H10W 20/0245: {comprising use of blind vias during the manufacture}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W 20/481: {on the rear surfaces of the wafers or substrates}
- B82Y 20/00: Nanooptics, e.g. quantum optics or photonic crystals
- H10W 72/90: Bond pads, in general
- H10W 72/941: {Dispositions of bond pads}
- H10W 72/944: {Dispositions of multiple bond pads}
- H10W 80/312: {characterised by the direct bonding of electrically conductive pads}
- H10W 80/327: {characterised by the direct bonding of insulating parts, e.g. of silicon oxide layers}
- H10W 90/722: {between stacked chips}
- H10W 90/792: {between multiple chips}
- Y02E 10/547: Monocrystalline silicon PV cells
- Y10S 977/742: Carbon nanotubes, CNTs
- Y10S 977/954: Of radiant energy
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- B82Y: SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- Y02E: REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y10S: TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

## Abstract

A semiconductor device including a semiconductor layer that includes an active region, semiconductor elements that are formed using the active region, connection regions that are obtained by metalizing parts of the semiconductor layer in an island shape isolated from the active region, an insulation film that is formed to cover one main surface side of the semiconductor layer, electrodes that are disposed to face the semiconductor elements and the connection regions via the insulation film, and contacts that penetrate through the insulation film to be selectively formed in portions according to necessity among portions that connect the semiconductor elements or the connection regions to the electrodes.

## Claims

### Claim 1

A semiconductor device comprising:
a first element layer with (a) a first semiconductor layer that includes a first active region, (b) a first semiconductor element that is comprised of the first active region, (c) one or more connection regions each of which is an island-shaped metalized part of the first semiconductor layer isolated from the first active region, (d) a first insulation film covering one main surface side of the first semiconductor layer, (e) one or more electrodes embedded in the insulation film each with a portion exposed to outside of the insulation film, (f) one or more first contacts penetrating through the insulation film and connecting the semiconductor element or the one or more connection regions to the one or more electrodes;
a second element layer with (a) a second semiconductor layer that includes a second active region, (b) a second semiconductor element that is comprised of the second active region, (c) a laminated insulation film over one main surface side of the second semiconductor layer, (d) one or more counter electrodes embedded in the laminated insulation film each with a portion exposed to outside of the laminated insulation film, one or more second contacts penetrating through the laminated insulation film and connecting the second semiconductor element to the one or more counter electrodes; and
between at least one of the electrodes and at least one of the counter electrodes, a tantalum oxide layer having conductivity and material of the one or more electrodes, material of the one or more counter electrodes, or materials of both the one or more electrodes and the one or more counter electrodes diffused therein.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1, comprising plural connection regions, plural electrodes, and plural counter electrodes.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1, wherein the first semiconductor element is a transistor.

### Claim 4 (depends on 1)

The semiconductor device according to claim 1, wherein each of the first semiconductor element and the second semiconductor element is a transistor.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1, the one or more contacts connect the one or more electrodes to the one or more connection regions.

### Claim 6 (depends on 1)

The semiconductor device according to claim 1, wherein the one or more contacts connect the one or more electrodes to the first semiconductor element.

### Claim 7 (depends on 1)

The semiconductor device according to claim 1, wherein the first semiconductor element and the second semiconductor elements are comprised of different semiconductor materials.

### Claim 8 (depends on 1)

The semiconductor device according to claim 1, wherein the first semiconductor layer comprises, the second semiconductor layer comprises, or both comprise silicon (Si), germanium (Ge), silicon germanium (SiGe), silicon carbide (SiC), carbon (C), carbon nanotube, graphene, gallium arsenide (GaAs), or indium gallium arsenide (InGaAs).