# US 10,319,773 B2 · Semiconductor device, solid-state image sensor and camera system > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,319,773 B2 - Document ID: US10319773B2 - Status: Granted - Kind: B2 - Application number: 15/832,951 - Filed: 2017-12-06 - Published: 2018-04-05 - Granted: 2019-06-11 - Earliest claimed: 2010-01-08 - Assignees: Sony Corporation - Applicants: Sony Corporation - Inventors: Shunichi Sukegawa; Noriyuki Fukushima - Web page: https://patentgrep.com/patent/US10319773B2 ## CPC - H10W 90/00: Package configurations - H04N 25/70: SSIS architectures; Circuits associated therewith - H04N 25/77: Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components - H04N 25/78: Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters - H04N 25/79: Arrangements of circuitry being divided between different or multiple substrates, chips or circuit boards, e.g. stacked image sensors - H10F 39/018: {of hybrid image sensors} - H10F 39/028: {performed after manufacture of the image sensors, e.g. annealing, gettering of impurities, short-circuit elimination or recrystallisation} - H10F 39/18: Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors - H10F 39/182: {Colour image sensors} - H10F 39/8063: {Microlenses} - H10F 39/809: {of hybrid image sensors} - H10F 39/811: {Interconnections} - H10F 39/804: {Containers or encapsulations} - H10F 39/8053: {Colour filters} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION ## Abstract The present invention relates to a semiconductor device, a solid-state image sensor and a camera system capable of reducing the influence of noise at a connection between chips without a special circuit for communication and reducing the cost as a result. The semiconductor device includes: a first chip; and a second chip, wherein the first chip and the second chip are bonded to have a stacked structure, the first chip has a high-voltage transistor circuit mounted thereon, the second chip has mounted thereon a low-voltage transistor circuit having lower breakdown voltage than the high-voltage transistor circuit, and wiring between the first chip and the second chip is connected through a via formed in the first chip. ## Claims ### Claim 1 An imaging device comprising: a pixel array unit; a plurality of vias located outside of and not overlapping the pixel array unit, the plurality of vias including a first via and a second via; a first substrate including the pixel array unit and the plurality of vias; and a second substrate including a plurality of counters, wherein, the pixel array unit is located between the first via and the second via, the first substrate is stacked on the second substrate, and the first substrate is electrically connected to the second substrate. ### Claim 2 (depends on 1) The imaging device according to claim 1, wherein the second substrate further includes a reference signal generation circuit. ### Claim 3 (depends on 1) The imaging device according to claim 1, wherein the second substrate further includes a portion of a pixel driving circuit. ### Claim 4 (depends on 1) The imaging device according to claim 1, wherein the plurality of vias is located at end portions of a circuit block mounted on the first substrate. ### Claim 5 (depends on 4) The imaging device according to claim 4, wherein the circuit block mounted on the first substrate includes at least a portion of at least one of a drive circuit, a decoder circuit, and a comparator. ### Claim 6 (depends on 1) The imaging device according to claim 1, wherein the plurality of vias is located at corner portions of a circuit block mounted on the first substrate. ### Claim 7 (depends on 6) The imaging device according to claim 6, wherein the circuit block mounted on the first substrate includes at least a portion of at least one of a drive circuit, a decoder circuit, and a comparator. ### Claim 8 (depends on 1) The imaging device according to claim 1, wherein the first substrate further includes a comparator. ### Claim 9 (depends on 1) The imaging device of claim 1, wherein the first substrate includes: a via for supplying power; a via for signals; power supply wiring for power supplied through a via connected to a port of a circuit block on the first substrate; and signal wiring connected to a via near a corner of the circuit block. ### Claim 10 (depends on 1) The imaging device according to claim 1, wherein the first includes an analog circuit and the second substrate includes a digital circuit. ### Claim 11 An electronic apparatus comprising: an imaging device, including: a pixel array unit; a plurality of vias located outside of and not overlapping the pixel array unit, the plurality of vias including a first via and a second via; a first substrate including the pixel array unit and the plurality of vias; and a second substrate including a plurality of counters, wherein, the pixel array unit is located between the first via and the second via, the first substrate is stacked on the second substrate, and the first substrate is electrically connected to the second substrate, an optical system, including a lens that guides light to the imaging device; and a drive circuit that drives the imaging device. ### Claim 12 (depends on 11) The electronic apparatus according to claim 11, wherein the second substrate further includes a reference signal generation circuit. ### Claim 13 (depends on 11) The electronic apparatus according to claim 11, wherein the second substrate further includes a portion of a pixel driving circuit. ### Claim 14 (depends on 11) The electronic apparatus according to claim 11, wherein the plurality of vias is located at end portions of a circuit block mounted on the first substrate. ### Claim 15 (depends on 14) The electronic apparatus according to claim 14, wherein the circuit block mounted on the first substrate includes at least a portion of at least one of a drive circuit, a decoder circuit, and a comparator. ### Claim 16 (depends on 11) The electronic apparatus according to claim 11, wherein the plurality of vias is located at corner portions of a circuit block mounted on the first substrate. ### Claim 17 (depends on 16) The electronic apparatus according to claim 16, wherein the circuit block mounted on the first substrate includes at least a portion of at least one of a drive circuit, a decoder circuit, and a comparator. ### Claim 18 (depends on 11) The electronic apparatus according to claim 11, wherein the first substrate further includes a comparator. ### Claim 19 (depends on 11) The electronic apparatus of claim 11, wherein the first substrate includes: a via for supplying power; a via for signals; power supply wiring for power supplied through a via connected to a port of a circuit block on the first substrate; and signal wiring connected to a via near a corner of the circuit block. ### Claim 20 (depends on 11) The electronic apparatus according to claim 11, wherein the first includes an analog circuit and the second substrate includes a digital circuit. ### Claim 21 An imaging device comprising: a pixel array unit including a plurality of photodiodes and first and second outer edges that are parallel to one another, wherein the plurality of photodiodes are disposed between the first and second outer edges; a plurality of vias located outside of the pixel array unit, the plurality of vias including a first via and a second via; a first substrate including the pixel array unit and the plurality of vias; and a second substrate including a plurality of counters, wherein, the pixel array unit is located between the first via and the second via such that the first via is adjacent to the first outer edge and the second via is adjacent to the second outer edge, the first substrate is stacked on the second substrate, and the first substrate is electrically connected to the second substrate. ### Claim 22 An imaging device comprising: a pixel array unit; a plurality of vias located outside of the pixel array unit, the plurality of vias including a first via and a second via; a first substrate including the pixel array unit and the plurality of vias; and a second substrate including a plurality of counters, wherein, the pixel array unit is located between the first via and the second via such that the first via is adjacent to a first outer edge of the pixel array unit and the second via is adjacent to a second outer edge of the pixel unit, the first substrate is stacked on the second substrate, and the first substrate is electrically connected to the second substrate.