# US 10,319,768 B2 · Image sensor scheme for optical and electrical improvement

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- Number: US 10,319,768 B2
- Document ID: US10319768B2
- Status: Granted
- Kind: B2
- Application number: 15/688,077
- Filed: 2017-08-28
- Published: 2019-02-28
- Granted: 2019-06-11
- Earliest claimed: 2017-08-28
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Co., Ltd.
- Inventors: Sheng-Chan Li; Cheng-Hsien Chou; Cheng-Yuan Tsai; Keng-Yu Chou; Yeur-Luen Tu
- Web page: https://patentgrep.com/patent/US10319768B2

## CPC

- H10F 39/8067: {Reflectors}
- H10F 39/8027: {Geometry of the photosensitive area}
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION

## Abstract

The present disclosure relates to an image sensor integrated chip having a deep trench isolation (DTI) structure having a reflective element. In some embodiments, the image sensor integrated chip includes an image sensing element arranged within a substrate. A plurality of protrusions are arranged along a first side of the substrate over the image sensing element and one or more absorption enhancement layers are arranged over and between the plurality of protrusions. A plurality of DTI structures are arranged within trenches disposed on opposing sides of the image sensing element and extend from the first side of the substrate to within the substrate. The plurality of DTI structures respectively include a reflective element having one or more reflective regions configured to reflect electromagnetic radiation. By reflecting electromagnetic radiation using the reflective elements, cross-talk between adjacent pixel regions is reduced, thereby improving performance of the image sensor integrated chip.

## Claims

### Claim 1

An image sensor integrated chip, comprising:
an image sensing element arranged within a substrate;
a plurality of protrusions arranged along a first side of the substrate over the image sensing element;
one or more absorption enhancement layers arranged over and between the plurality of protrusions; and
a plurality of deep trench isolation (DTI) structures arranged within trenches disposed on opposing sides of the image sensing element and extending from the first side of the substrate to within the substrate, wherein the plurality of DTI structures comprise a reflective element configured to reflect electromagnetic radiation.

### Claim 2 (depends on 1)

The integrated chip of claim 1, wherein the reflective element comprises one or more metals separated from the substrate by one or more dielectric materials.

### Claim 3 (depends on 2)

The integrated chip of claim 2, wherein the reflective element comprises an air gap arranged below the one or more metals and separated from the substrate by the one or more dielectric materials.

### Claim 4 (depends on 2)

The integrated chip of claim 2, wherein the one or more absorption enhancement layers comprise:
an anti-reflective layer; and
a layer of dielectric material separated from the substrate by the anti-reflective layer.

### Claim 5 (depends on 4)

The integrated chip of claim 4, wherein the anti-reflective layer and the layer of dielectric material laterally separate the reflective element from the substrate.

### Claim 6 (depends on 4)

The integrated chip of claim 4, wherein the anti-reflective layer comprises a high-k dielectric material.

### Claim 7 (depends on 1)

The integrated chip of claim 1, wherein the trenches have sidewalls respectively comprising a linear segment and a curved segment between the linear segment from the first side of the substrate.

### Claim 8 (depends on 1)

The integrated chip of claim 1, further comprising:
a conductive contact arranged within the one or more absorptive enhancement layers at locations over the reflective element, wherein the conductive contact is configured to be coupled to a bias source.

### Claim 9 (depends on 1)

The integrated chip of claim 1, wherein the reflective element protrudes above the plurality of protrusions by a non-zero distance.

### Claim 10 (depends on 1)

The integrated chip of claim 1, wherein the reflective element has an uppermost surface that is recessed below the first side of the substrate.

### Claim 11

An image sensor integrated chip, comprising:
an image sensing element arranged within a substrate, wherein the substrate has interior surfaces defining a plurality of trenches extending from a back-side of the substrate to within the substrate on opposing sides of the image sensing element;
a plurality of protrusions arranged along the back-side of the substrate over the image sensing element;
one or more absorption enhancement layers on and in contact with the plurality of protrusions; and
a plurality of reflective elements arranged within the plurality of trenches, wherein the plurality of reflective elements are separated from the substrate by one or more dielectric materials.

### Claim 12 (depends on 11)

The integrated chip of claim 11, wherein the plurality of reflective elements respectively comprise a plurality of reflective regions having different materials.

### Claim 13 (depends on 11)

The integrated chip of claim 11, further comprising:
one or more conductive contacts extending from uppermost surfaces of the one or more absorption enhancement layers to the plurality of reflective elements.

### Claim 14 (depends on 11)

The integrated chip of claim 11, wherein the plurality of reflective elements respectively comprise one or more metals.

### Claim 15 (depends on 14)

The integrated chip of claim 14, wherein the one or more absorption enhancement layers comprise a high-k dielectric layer lining the interior surfaces defining the plurality of trenches.

### Claim 16 (depends on 11)

The integrated chip of claim 11, wherein the plurality of reflective elements respectively comprise an air gap.

### Claim 17 (depends on 11)

The integrated chip of claim 11, wherein the plurality of trenches extend from horizontally extending surfaces arranged between periodic arrays of the plurality of protrusions to within the substrate.

### Claim 18

A method of forming an image sensor integrated chip, comprising:
performing a first etching process on a first side of a substrate to define a plurality of protrusions along the first side of the substrate;
performing a second etching process on the first side of the substrate to define a plurality of trenches extending to within the substrate, wherein the first etching process and the second etching process are separate etching processes;
forming one or more absorption enhancement layers over and between the plurality of protrusions;
performing a third etching process on the one or more absorption enhancement layers to form cavities extending to within the plurality of trenches; and
forming reflective elements within the plurality of trenches.

### Claim 19 (depends on 18)

The method of claim 18, wherein forming the reflective elements comprises:
depositing a metal within the plurality of trenches, wherein the metal is separated from the substrate by one or more dielectric materials.

### Claim 20 (depends on 19)

The method of claim 19, further comprising:
performing a fourth etching process to remove a part of the metal and form recesses within the one or more absorption enhancement layers; and
depositing a conductive material within the recesses to form conductive contacts extending through the one or more absorption enhancement layers to the reflective elements.
