# US 10,319,743 B2 · Semiconductor device, display system, and electronic device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,319,743 B2 - Document ID: US10319743B2 - Status: Granted - Kind: B2 - Application number: 15/837,270 - Filed: 2017-12-11 - Published: 2018-06-21 - Granted: 2019-06-11 - Earliest claimed: 2016-12-16 - Assignees: Semiconductor Energy Laboratory Co., Ltd. - Applicants: Semiconductor Energy Laboratory Co., Ltd. - Inventors: Yoshiyuki Kurokawa - Web page: https://patentgrep.com/patent/US10319743B2 ## CPC - H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO} - G02F 1/136286: {Wiring, e.g. gate line, drain line} - G09G 3/20: for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} - G09G 3/3208: organic, e.g. using organic light-emitting diodes [OLED] - G09G 3/3266: Details of drivers for scan electrodes - G09G 3/3677: {suitable for active matrices only} - G09G 5/39: Control of the bit-mapped memory - G09G 5/393: Arrangements for updating the contents of the bit-mapped memory - H10D 86/60: wherein the TFTs are in active matrices - H10D 88/00: Three-dimensional [3D] integrated devices - H10K 59/123: Connection of the pixel electrodes to the thin film transistors [TFT] - H10K 59/131: Interconnections, e.g. wiring lines or terminals - H10K 71/40: Thermal treatment, e.g. annealing in the presence of a solvent vapour - H10P 14/40: of conductive or resistive materials - G09G 2300/0408: Integration of the drivers onto the display substrate - G09G 2300/0417: Special arrangements specific to the use of low carrier mobility technology - G09G 2310/0286: Details of a shift registers arranged for use in a driving circuit - G09G 2310/0289: Details of voltage level shifters arranged for use in a driving circuit - G09G 2310/0291: Details of output amplifiers or buffers arranged for use in a driving circuit - G09G 2310/0294: Details of sampling or holding circuits arranged for use in a driver for data electrodes - G09G 2320/0276: for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction - G09G 2340/06: Colour space transformation - G09G 2360/144: the light being ambient light - H10K 77/10: Substrates, e.g. flexible substrates - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract A novel semiconductor device or display device is provided. A semiconductor substrate is used as a substrate of a display portion and a transistor in the display portion is formed using the semiconductor substrate. In this way, variation in the characteristics of the transistors among pixels is reduced and pixel density can be increased. Moreover, transistors used for a driver circuit, a signal generation circuit, and a level shifter are formed using the semiconductor substrate. As a result, these circuits can be formed directly on the substrate of the display portion, whereby bonding of a chip and the substrate is unnecessary. Furthermore, these circuits can be easily connected to each other, so that signal delay or an increase in power consumption due to complicated wirings can be prevented. ## Claims ### Claim 1 A semiconductor device comprising: a pixel portion comprising a pixel comprising a first transistor; a driver circuit comprising a second transistor; a signal generation circuit comprising a third transistor and a fourth transistor; and a level shifter comprising a fifth transistor, wherein the level shifter is configured to amplify a signal input from the signal generation circuit and output an amplified signal to the driver circuit, wherein a channel region of the first transistor, a channel region of the second transistor, and a channel region of the third transistor are formed in a semiconductor substrate, wherein each of a channel region of the fourth transistor and a channel region of the fifth transistor is formed in a semiconductor film, and wherein the semiconductor film comprises a metal oxide. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein the signal generation circuit comprises a memory device, and wherein the memory device comprises the fourth transistor. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, wherein the fourth transistor and the fifth transistor are stacked over the first transistor, the second transistor, and the third transistor. ### Claim 4 (depends on 1) The semiconductor device according to claim 1, wherein the pixel comprises a sixth transistor and a light-emitting element, wherein one of a source and a drain of the first transistor is electrically connected to one electrode of the light-emitting element, wherein one of a source and a drain of the sixth transistor is electrically connected to a gate of the first transistor, and wherein a channel region of the sixth transistor is formed in a semiconductor film containing a metal oxide. ### Claim 5 (depends on 1) The semiconductor device according to claim 1, wherein the semiconductor substrate is a single crystal silicon substrate, a single crystal germanium substrate, a compound semiconductor substrate, or an SOI substrate. ### Claim 6 (depends on 1) A display system comprising: the semiconductor device according to claim 1; and a host, wherein the signal generation circuit is configured to generate a video signal on the basis of image data input from the host. ### Claim 7 (depends on 6) The display system according to claim 6, wherein the semiconductor device comprises an arithmetic circuit, wherein the host comprises software, wherein the arithmetic circuit constitutes a first neural network, wherein the software constitutes a second neural network, wherein the first neural network is configured to output a parameter used for image processing on the basis of information on an environment where video displayed on the pixel portion is seen, wherein the second neural network is configured to perform supervised learning, and wherein a weight coefficient of the second neural network updated by the supervised learning is output to the first neural network. ### Claim 8 (depends on 6) An electronic device comprising the display system according to claim 6.