# US 10,319,714 B2 · Drain-extended metal-oxide-semiconductor bipolar switch for electrical overstress protection > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,319,714 B2 - Document ID: US10319714B2 - Status: Granted - Kind: B2 - Application number: 15/413,825 - Filed: 2017-01-24 - Published: 2018-07-26 - Granted: 2019-06-11 - Earliest claimed: 2017-01-24 - Assignees: Analog Devices, Inc. - Applicants: Analog Devices, Inc. - Inventors: Sirui Luo; Javier Alejandro Salcedo - Web page: https://patentgrep.com/patent/US10319714B2 ## CPC - H10D 89/811: {using FETs as protective elements} - H10D 30/603: {having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS]} - H10D 62/393: {Body regions of DMOS transistors or IGBTs (cell layout of DMOS H10D62/127)} - H10D 89/815: {involving a parasitic bipolar transistor triggered by the local electrical biasing of the layer acting as base region of said parasitic bipolar transistor} - H10D 62/127: {of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract High voltage drain-extended metal-oxide-semiconductor (DEMOS) bipolar switches for electrical overstress protection are provided. In certain configurations herein, an electrical overstress switch embodiment for providing electrical overstress protection, such as electrostatic discharge/electrical overstress (ESD/EOS) protection includes both a DEMOS device and an embedded bipolar device. The switch is implemented to achieve the advantages provided by the combined conduction of DEMOS and bipolar devices. For example, the DEMOS device provides surface conduction at the gate region for relatively fast switch device turn on and low voltage overshoot, while the bipolar device provides high current conduction during stress condition and a high holding voltage characteristics to prevent latch-up in mission critical integrated circuit applications. ## Claims ### Claim 1 An integrated circuit (IC) comprising: a substrate; and an electrical overstress switch formed in the substrate and comprising a drain-extended metal-oxide-semiconductor (DEMOS) device and a bipolar device configured to clamp in response to an electrical overstress condition, wherein the electrical overstress switch further comprises: a semiconductor region that operates as a base of the bipolar device; an active region that operates as an emitter of the bipolar device and as a source of the DEMOS device, wherein the active region is formed in the semiconductor region and is of opposite doping type as the semiconductor region; a well that operates as a collector of the bipolar device and as a drain of the DEMOS device, wherein the well is spaced apart from the active region in the semiconductor region, and is of common doping type as the active region; a gate region that operates as a gate of the DEMOS device, wherein the gate region is formed over the semiconductor region and extends from an edge of the active region to an edge of the well; and a well ring surrounding the semiconductor region and of opposite doping type as the semiconductor region, the well ring and the semiconductor region configured to operate as a reverse protection diode device. ### Claim 2 (depends on 1) The IC of claim 1, wherein the electrical overstress switch further comprises a gate oxide layer between the gate region and the semiconductor region, wherein a portion of the gate oxide layer adjacent to the drain of the DEMOS device is thicker than a portion of the gate oxide layer adjacent to the source of the DEMOS device. ### Claim 3 (depends on 1) The IC of claim 1, wherein the active region comprises a first p-type active (P+) region electrically connected to a first terminal via metallization, wherein the electrical overstress switch further comprises a second P+ region formed in the well and electrically connected to a second terminal via metallization. ### Claim 4 (depends on 3) The IC of claim 3, wherein the electrical overstress switch further comprises a field oxide region extending from the second P+ region to beneath a portion of the gate region. ### Claim 5 (depends on 3) The IC of claim 3, wherein the semiconductor region comprises a high voltage n-type well (HVNW) and an n-type well (NW) formed in the HVNW, wherein the NW is shallower and of higher n-type doping concentration than the HVNW. ### Claim 6 (depends on 5) The IC of claim 5, wherein NW is spaced apart from the well that operates as the collector of the bipolar device. ### Claim 7 (depends on 5) The IC of claim 5, wherein NW abuts the well that operates as the collector of the bipolar device. ### Claim 8 (depends on 5) The IC of claim 5, wherein the electrical overstress switch further comprises an n-type active (N+) ring in the HVNW and surrounding the NW and the well that operates as the collector of the bipolar device. ### Claim 9 (depends on 8) The IC of claim 8, wherein the electrical overstress switch further comprises a variable resistor electrically connected between the N+ ring and the first terminal, wherein an amount of resistance of the variable resistor controls a forward trigger voltage between the first terminal and the second terminal. ### Claim 10 (depends on 5) The IC of claim 5, wherein the well ring surrounding the semiconductor region comprises a p-type well (PW) ring surrounding the HVNW, wherein the PW ring operates as an anode of the reverse protection diode device, and the HVNW operates as a cathode of the reverse protection diode device. ### Claim 11 (depends on 10) The IC of claim 10, further comprising a P+ ring in the PW ring and electrically connected to the second terminal, and an N+ ring in the HVNW and electrically connected to the first terminal. ### Claim 12 (depends on 3) The IC of claim 3, wherein the electrical overstress switch has a forward holding voltage between the first terminal and the second terminal of at least 30 V, is operable to withstand at least about a 2,000 V human body model (HBM) electrical overstress event, and occupies an area of the substrate that is less than about 2,000 μm2. ### Claim 13 (depends on 1) The IC of claim 1, wherein the electrical overstress switch further comprises a gate control circuit configured to control the gate region to turn on the DEMOS device in response to detecting an electrical overstress condition. ### Claim 14 An electrical overstress switch for a high voltage interface, the electrical overstress switch comprising: a first terminal; a second terminal; a bipolar device comprising an emitter formed from an active region, a base formed from a semiconductor region of opposite doping type as the active region, and a collector formed from a well of common doping type as the active region, wherein the active region is electrically connected to the first terminal, and the well is electrically connected to the second terminal; an extended-drain metal oxide semiconductor (DEMOS) device comprising a drain formed from the well, a source formed from the active region, a body formed from the semiconductor region, and a gate formed from a gate region, wherein the gate region is formed over a field oxide region and the semiconductor region, and extends from an edge of the active region to an edge of the well; and a well ring surrounding the semiconductor region and of opposite doping type as the semiconductor region, the well ring and the semiconductor region configured to operate as a reverse protection diode device. ### Claim 15 (depends on 14) The electrical overstress switch of claim 14, wherein the active region comprises a first p-type active (P+) region electrically connected to the first terminal via metallization, wherein the electrical overstress switch further comprises a second P+ region formed in the well and electrically connected to the second terminal via metallization. ### Claim 16 (depends on 15) The electrical overstress switch of claim 15, wherein the field oxide region extends from the second P+ region to beneath a portion of the gate region. ### Claim 17 A system-on-a-package (SoP) comprising: a package substrate; and a system-on-a-chip (SoC) attached to the package substrate and configured to receive a high voltage supply and ground, wherein the SoC comprises: a high voltage interface circuit powered by the high voltage supply and ground; and an electrical overstress switch comprising an extended-drain metal oxide semiconductor (DEMOS) device and a bipolar device configured to protect the high voltage interface circuit from electrical overstress, wherein the bipolar device comprises an emitter formed from an active region, a base formed from a semiconductor region of opposite doping type as the active region, and a collector formed from a well of common doping type as the active region, wherein the DEMOS device comprises a drain formed from the well, a source formed from the active region, a body formed from the semiconductor region, and a gate formed over a field oxide region and the semiconductor region, and extending from an edge of the active region to an edge of the well, the electrical overstress switch further comprising a well ring surrounding the semiconductor region and of opposite doping type as the semiconductor region, the well ring and the semiconductor region configured to operate as a reverse protection diode device. ### Claim 18 (depends on 17) The SoP of claim 17, wherein the active region comprises a first p-type active (P+) region electrically connected to the high voltage supply via metallization, wherein the electrical overstress switch further comprises a second P+ region formed in the well and electrically connected to ground via metallization. ### Claim 19 (depends on 18) The SoP of claim 18, wherein the field oxide region extends from the second P+ region to beneath a portion of the gate region. ### Claim 20 (depends on 18) The SoP of claim 18, further comprising one or more sensors attached to the package substrate, wherein the high voltage interface is operable to handle at least one sensor signal associated with the one or more sensors.