# US 10,319,690 B2 · Semiconductor structure and manufacturing method thereof

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- Number: US 10,319,690 B2
- Document ID: US10319690B2
- Status: Granted
- Kind: B2
- Application number: 15/581,649
- Filed: 2017-04-28
- Published: 2018-11-01
- Granted: 2019-06-11
- Earliest claimed: 2017-04-28
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company Ltd.
- Inventors: Wen-Shiang Liao; Chewn-Pu Jou; Chih-Hang Tung; Chen-Hua Yu
- Web page: https://patentgrep.com/patent/US10319690B2

## CPC

- H10W 44/20: at high-frequency [HF] or radio frequency [RF]
- H10W 70/095: {of vias therein}
- H10W 70/099: {Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers}
- H10W 70/611: {for connecting multiple chips together}
- H10W 70/635: {Through-vias}
- H10W 70/65: Shapes or dispositions of interconnections
- H10W 70/685: comprising multiple insulating layers
- H10W 74/012: {of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills}
- H10W 74/016: {using moulds}
- H10W 74/127: {characterised by arrangements for sealing or adhesion}
- H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills
- H10W 90/00: Package configurations
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H01P 3/16: Dielectric waveguides, i.e. without a longitudinal conductor
- H10W 44/216: {Waveguides, e.g. strip lines}
- H10W 72/072: {of bump connectors}
- H10W 72/073: {of die-attach connectors}
- H10W 74/117: {the substrate having spherical bumps for external connection}
- H10W 74/142: {the encapsulations exposing the passive side of the semiconductor body}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H01P: WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE (operating at optical frequencies G02B)

## Abstract

A semiconductor structure includes a substrate; an interconnect structure formed over the substrate and including a dielectric layer over the substrate, a first conductive member formed within the dielectric layer and a second conductive member formed within the dielectric layer; a waveguide formed between the first conductive member and the second conductive member; a first die disposed over the interconnect structure and electrically connected to the first conductive member; and a second die disposed over the interconnect structure and electrically connected to the second conductive member, wherein the waveguide is coupled with the first conductive member and the second conductive member.

## Claims

### Claim 1

A semiconductor structure, comprising:
a semiconductive substrate;
an interconnect structure disposed over the semiconductive substrate and including a dielectric layer over the semiconductive substrate, a first conductive member disposed within the dielectric layer and a second conductive member disposed within the dielectric layer;
a via extended through at least a portion of the semiconductive substrate and electrically connected to the first conductive member or the second conductive member;
a waveguide disposed between the first conductive member and the second conductive member;
a first die disposed over the interconnect structure and electrically connected to the first conductive member; and
a second die disposed over the interconnect structure and electrically connected to the second conductive member,
wherein the waveguide is coupled with the first conductive member and the second conductive member, the waveguide is electrically connected to the via through the first conductive member or the second conductive member, the waveguide has a surface facing the first die and the second die, and the first conductive member and the second conductive member are in contact with the surface of the waveguide.

### Claim 2 (depends on 1)

The semiconductor structure of claim 1, wherein the first die and the second die are disposed adjacent to each other.

### Claim 3 (depends on 1)

The semiconductor structure of claim 1, wherein the waveguide is configured to transmit an electromagnetic signal from the first conductive member to the second conductive member within the waveguide.

### Claim 4 (depends on 1)

The semiconductor structure of claim 1, wherein the waveguide is configured to transmit an electromagnetic signal in a frequency of greater than 10 GHz.

### Claim 5 (depends on 1)

The semiconductor structure of claim 1, wherein a dielectric constant of the waveguide is substantially greater than a dielectric constant of the dielectric layer.

### Claim 6 (depends on 1)

The semiconductor structure of claim 1, wherein the first die is disposed over the first conductive member, and the second die is disposed over the second conductive member.

### Claim 7 (depends on 1)

The semiconductor structure of claim 1, wherein the first conductive member and the second conductive member are laterally extended within the dielectric layer.

### Claim 8 (depends on 1)

The semiconductor structure of claim 1, wherein the waveguide includes silicon nitride, silicon carbide or a dielectric material with a dielectric constant substantially greater than 4.

### Claim 9 (depends on 1)

The semiconductor structure of claim 1, further comprising a molding surrounding the first die and the second die.

### Claim 10 (depends on 9)

The semiconductor structure of claim 9, wherein a portion of the molding is disposed over the waveguide.

### Claim 11 (depends on 1)

The semiconductor structure of claim 1, further comprising:
a first conductive bump disposed over the semiconductive substrate and the via and electrically connected to the via;
a second conductive bump disposed between the first die and the interconnect structure or between the second die and the interconnect structure; and
an underfill material surrounding the second conductive bump.

### Claim 12

A semiconductor structure, comprising:
a semiconductive substrate;
a via extended through at least a portion of the semiconductive substrate;
an interconnect structure disposed over the semiconductive substrate and including a dielectric layer, a first transmission electrode disposed within the dielectric layer and a first receiving electrode disposed within the dielectric layer;
a waveguide disposed within the dielectric layer and in contact with the first transmission electrode and the first receiving electrode;
a transmission die disposed over the interconnect structure and including a transmission circuit electrically connected to the first transmission electrode; and
a receiving die disposed over the interconnect structure and including a receiving circuit electrically connected to the first receiving electrode,
wherein the via is electrically connected to the first transmission electrode or the first receiving electrode, the waveguide is electrically connected to the via through the first transmission electrode or the first receiving electrode, the transmission circuit is configured to generate an electrical signal, the receiving circuit is configured to receive the electrical signal, the electrical signal is convertible to an electromagnetic signal transmittable from the first transmission electrode to the first receiving electrode within the waveguide.

### Claim 13 (depends on 12)

The semiconductor structure of claim 12, further comprising:
a second transmission electrode disposed within the dielectric layer and disposed opposite to the first transmission electrode; and
a second receiving electrode disposed within the dielectric layer and disposed opposite to the first receiving electrode.

### Claim 14 (depends on 13)

The semiconductor structure of claim 13, wherein a first end of the waveguide is surrounded by the first transmission electrode and the second transmission electrode, and a second end of the waveguide opposite to the first end is surrounded by the first receiving electrode and the second receiving electrode.

### Claim 15 (depends on 12)

The semiconductor structure of claim 12, wherein a height of the waveguide is about 1 um to about 10 um, or a width of the waveguide is about 10 μm to about 100 μm.

### Claim 16 (depends on 12)

The semiconductor structure of claim 12, wherein the transmission die includes a system on chip (SoC), central processing unit (CPU) die, graphics processing unit (GPU) die or mobile phone application processing (AP) die, and the receiving die includes high bandwidth memory (HBM) die.

### Claim 17 (depends on 12)

The semiconductor structure of claim 12, wherein the waveguide includes silicon nitride, silicon carbide, low-temperature silicon dioxide (SiO2), silicon nitride (SiNx), silicon oxynitride (SiOxNy), low-temperature titanium dioxide (TiO2), zirconium dioxide (ZrO2), aluminum oxide (Al2O3), hafnium oxide (HfOx), Hafnium silicate (HfSiOx), zirconium titanate (ZrTiOx), tantalum oxide (TaOx), strontium titanate (SrTiO3 or barium titanate (BaTiO3).

### Claim 18

A semiconductor structure, comprising:
a semiconductive substrate;
a dielectric layer over the semiconductive substrate;
a first conductive member and a second conductive member disposed within the dielectric layer;
a third conductive member and a fourth conductive member disposed within the dielectric layer and below the first conductive member and the second conductive member;
a waveguide disposed within the dielectric layer, an end of the waveguide disposed between and in contact with the first conductive member and the third conductive member, and another end of the waveguide disposed between and in contact with the second conductive member and the fourth conductive member; and
a via extended through at least a portion of the semiconductive substrate and electrically connected to the first conductive member or the second conductive member; wherein the waveguide is coupled with the first conductive member and the second conductive member to transmit an electromagnetic signal from the first conductive member to the second conductive member, and the via is electrically connected to the waveguide through the first conductive member or the second conductive member.

### Claim 19 (depends on 18)

The semiconductor structure of claim 18, wherein the first conductive member is configured to convert an electrical signal to the electromagnetic signal, and the second conductive member is configured to receive the electromagnetic signal and convert the electromagnetic signal to an electrical signal.

### Claim 20 (depends on 18)

The semiconductor structure of claim 18, further comprising a first die electrically connected to the first conductive member and a second die electrically connected to the second conductive member.
