# US 10,319,689 B2 · Antenna assembly for wafer level packaging > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,319,689 B2 - Document ID: US10319689B2 - Status: Granted - Kind: B2 - Application number: 14/955,471 - Filed: 2015-12-01 - Published: 2017-06-01 - Granted: 2019-06-11 - Earliest claimed: 2015-12-01 - Assignees: NXP USA, Inc. - Applicants: Freescale Semiconductor, Inc. - Inventors: Weng Foong Yap; Jinbang Tang - Web page: https://patentgrep.com/patent/US10319689B2 ## CPC - H10W 44/20: at high-frequency [HF] or radio frequency [RF] - H01Q 1/2283: {mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package} - H10W 42/20: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons - H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) - H10W 70/611: {for connecting multiple chips together} - H10W 70/614: {the multiple chips being integrally enclosed} - H10W 70/65: Shapes or dispositions of interconnections - H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs} - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H10W 44/203: {Electrical connections} - H10W 44/248: {for antennas} - H10W 72/241: {Dispositions, e.g. layouts} - H10W 72/9413: {on encapsulations} - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H01Q: ANTENNAS, i.e. RADIO AERIALS (radiators or antennas for microwave heating H05B6/72) ## Abstract Embodiments are provided for a packaged semiconductor device that includes a package substrate that in turn includes an embedded die configured to process a radio frequency (RF) signal; a printed circuit board (PCB) attached to a front side of the package substrate, where the PCB includes a cavity; and an antenna enabling element attached to the front side of the package substrate within the cavity, the antenna enabling element configured to convey the RF signal through the cavity. ## Claims ### Claim 1 A radio frequency (RF) semiconductor device comprising: a package substrate comprising: an embedded die configured to process a radio frequency (RF) signal, and embedded interconnects between an active side of the embedded die and a front side of the package substrate, wherein the embedded interconnects have contact areas exposed at the front side of the package substrate; a printed circuit board (PCB) having a first side and a second side that opposes the first side, wherein the PCB includes a cavity that extends from the first side to the second side of the PCB, wherein the first side of the PCB is attached to the front side of the package substrate by a plurality of solder connections that are attached to a first subset of the contact areas of the embedded interconnects exposed at the front side of the package substrate, and wherein the PCB is configured to: provide ground to the embedded die through a first solder connection of the plurality of solder connections, and provide a power supply voltage to the embedded die through a second solder connection of the plurality of solder connections; and an antenna enabling element attached to the front side of the package substrate within the cavity, the antenna enabling element configured to convey the RF signal through the cavity between the first side and the second side of the PCB. ### Claim 2 (depends on 1) The RF semiconductor device of claim 1, wherein the antenna enabling element comprises a connector for an antenna. ### Claim 3 (depends on 1) The RF semiconductor device of claim 1, wherein the antenna enabling element comprises a structure that includes an antenna, the structure comprising one of a group including a ball grid array (BGA) package, a land grid array (LGA) package, and a dedicated antenna structure. ### Claim 4 (depends on 1) The RF semiconductor device of claim 1, wherein the antenna enabling element comprises an antenna, the antenna comprising one of a group including a patch antenna, a microstrip antenna, and an aperture antenna. ### Claim 5 (depends on 1) The RF semiconductor device of claim 1, wherein the active side of the embedded die is proximal to the front side of the package substrate, a backside of the embedded die is proximal to and surrounded by a package body of the package substrate, and the embedded interconnects are formed in a layout for a fan out wafer level package (FOWLP). ### Claim 6 (depends on 1) The RF semiconductor device of claim 1, wherein the antenna enabling element extends through at least a portion of the PCB. ### Claim 7 (depends on 1) The RF semiconductor device of claim 1, wherein the package substrate further comprises a plurality of buildup layers over the embedded die that form the embedded interconnects, and the plurality of buildup layers comprises a top conductive layer having portions exposed on the front side of the package substrate to form the contact areas of the embedded interconnects. ### Claim 8 (depends on 7) The RF semiconductor device of claim 7, wherein the antenna enabling element is attached to the front side of the package substrate by another plurality of solder connections that are attached to a second subset of contact areas of the embedded interconnects exposed at the front side of the package substrate. ### Claim 9 (depends on 7) The RF semiconductor device of claim 7, wherein a shielding layer is formed from the top conductive layer on the front side of the package substrate, the shielding layer located between the antenna enabling element and the embedded die. ### Claim 10 (depends on 1) The RF semiconductor device of claim 1, wherein a frequency of the RF signal is measured in millimeters. ### Claim 11 (depends on 1) The RF semiconductor device of claim 1, wherein the embedded die is positioned within the package substrate to underlie the cavity. ### Claim 12 (depends on 1) The RF semiconductor device of claim 1, wherein the cavity is positioned on an edge of the PCB. ### Claim 13 (depends on 1) The RF semiconductor device of claim 1, wherein the cavity is positioned in a corner of the PCB. ### Claim 14 (depends on 1) The RF semiconductor device of claim 1, wherein the front side of the package substrate comprises one or more openings in a dielectric material to form one or more external contact areas. ### Claim 15 (depends on 14) The RF semiconductor device of claim 14, wherein the front side of the package substrate further comprises one or more portions of an exposed conductive layer over the dielectric material to form one or more additional external contact areas. ### Claim 16 (depends on 1) The RF semiconductor device of claim 1, wherein the antenna enabling element is coupled to the embedded die by a signal path, and the signal path comprises one or more from a group including solder connections on the front side of the package substrate and embedded interconnects in the package substrate. ### Claim 17 (depends on 16) The RF semiconductor device of claim 16, wherein the signal path between the antenna enabling element and the embedded die is less than 100 microns. ### Claim 18 (depends on 1) The RF semiconductor device of claim 1, wherein the embedded die comprises a transmitter and the RF signal is conveyed from the first side of the PCB to the second side of the PCB through the cavity. ### Claim 19 (depends on 1) The RF semiconductor device of claim 1, wherein the embedded die comprises a receiver and the RF signal is conveyed from the second side of the PCB to the first side of the PCB through the cavity. ### Claim 20 A packaged semiconductor device comprising: an integrated circuit die embedded in a package body, wherein the integrated circuit die has an active side exposed in a top surface of the package body, the integrated circuit die is configured to process a radio frequency (RF) signal; a plurality of buildup layers over and contacting the active side of the integrated circuit die and the top surface of the package body, wherein the plurality of buildup layers form a plurality of embedded interconnects to the integrated circuit die, wherein the plurality of embedded interconnects have contact areas exposed at a top buildup layer; an antenna enabling element attached to a first subset of contact areas; and a printed circuit board (PCB) having a first side attached a second subset of contact areas by a plurality of solder connections, wherein the PCB is configured to: provide ground to the integrated circuit die through a first solder connection of the plurality of solder connections, and provide a power supply voltage to the integrated circuit die through a second solder connection of the plurality of solder connections, wherein at least a portion of the PCB is located laterally to the antenna enabling element, and the antenna enabling element is configured to convey the RF signal between the first side of the PCB and a second side of the PCB that opposes the first side. ### Claim 21 (depends on 20) The packaged semiconductor device of claim 20, wherein the antenna enabling element comprises a structure that includes an antenna, the structure comprising one of a group including a ball grid array (BGA) package, a land grid array (LGA) package, and a dedicated antenna structure. ### Claim 22 (depends on 20) The packaged semiconductor device of claim 20, wherein the antenna enabling element comprises an antenna, the antenna comprising one of a group including a patch antenna, a microstrip antenna, and an aperture antenna.