# US 10,319,688 B2 · Antenna on ceramics for a packaged die

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- Number: US 10,319,688 B2
- Document ID: US10319688B2
- Status: Granted
- Kind: B2
- Application number: 14/361,625
- Filed: 2013-12-09
- Published: 2016-08-18
- Granted: 2019-06-11
- Earliest claimed: 2013-12-09
- Assignees: Intel Corporation
- Applicants: Intel Corporation
- Inventors: Andreas Wolter; Saravana Maruthamuthu; Mikael Knudsen; Thorsten Meyer; Georg Seidemann; Pablo Herrero; Pauli Jaervinen
- Web page: https://patentgrep.com/patent/US10319688B2

## CPC

- H10W 44/20: at high-frequency [HF] or radio frequency [RF]
- H01Q 1/2283: {mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package}
- H01Q 1/38: formed by a conductive layer on an insulating support {(patch antennas H01Q9/0407; microstrip dipole antennas H01Q9/065; microstrip slot antennas H01Q13/106; transmission line microstrip antennas H01Q13/206; manufacturing reflecting surfaces using insulating material for supporting the reflecting surface H01Q15/142)}
- H01Q 1/50: Structural association of antennas with earthing switches, lead-in devices or lightning protectors
- H01Q 1/526: {Electromagnetic shields}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W 42/20: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
- H10W 70/05: of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04)
- H10W 70/09: extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 70/65: Shapes or dispositions of interconnections
- H10W 72/072: {of bump connectors}
- H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W 74/117: {the substrate having spherical bumps for external connection}
- H10W 90/00: Package configurations
- H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs}
- H10W 44/209: {Vertical interconnections, e.g. vias}
- H10W 44/248: {for antennas}
- H10W 72/241: {Dispositions, e.g. layouts}
- H10W 72/354: {comprising polymers}
- H10W 72/823: {Interconnections through encapsulations, e.g. pillars through molded resin on a lateral side a chip}
- H10W 72/874: {On different surfaces}
- H10W 72/877: {Bump connectors and die-attach connectors}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 74/473: {containing a filler}
- H10W 90/722: {between stacked chips}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H01Q: ANTENNAS, i.e. RADIO AERIALS (radiators or antennas for microwave heating H05B6/72)

## Abstract

An antenna is described on ceramics that may be used for a packaged die. In one example, a package has a die, a ceramic substrate over the die, an antenna attached to the ceramic substrate, and conductive leads electrically connecting the antenna to the die.

## Claims

### Claim 1

A package comprising:
a die;
a dielectric ceramic substrate over the die, the ceramic substrate having a thickness of at least 10 micrometers, wherein the dielectric ceramic substrate has a first surface facing the die, a second surface facing away from the die, and a sidewall surface connecting the first surface to the second surface;
an antenna formed on the second surface of the ceramic substrate, wherein the antenna is positioned over the die, the antenna being positioned such that the dielectric of the ceramic increases the resonant frequency of the antenna;
a conductive shield layer between the first surface of the ceramic substrate and the die;
conductive leads electrically connecting the antenna to the die; and
a mold compound over the die and completely covering the sidewall surface of the ceramic substrate.

### Claim 2 (depends on 1)

The package of claim 1, wherein the shield layer is formed on the first surface of the ceramic substrate.

### Claim 3 (depends on 1)

The package of claim 1, wherein the conductive leads comprise through-mold vias from the antenna to the die.

### Claim 4 (depends on 1)

The package of claim 1, wherein the shield is grounded through a via to an external connection.

### Claim 5 (depends on 1)

The package of claim 1, further comprising a package substrate attached to the die and wherein at least a portion of the conductive leads are coupled to the die through the package substrate.

### Claim 6 (depends on 5)

The package of claim 5, wherein the conductive leads include routing paths in the package substrate.

### Claim 7 (depends on 5)

The package of claim 5, further comprising a mold compound over the ceramic substrate and the die and wherein the package substrate comprises a redistribution layer on a front side of the die and on the mold compound.

### Claim 8 (depends on 1)

The package of claim 1, wherein the shield layer on the first surface is to isolate the antenna from the die, the package further comprising a conductive trace on a third surface of the ceramic substrate between the first surface and the second surface to electrically connect the antenna to a conductive lead proximate the first surface.

### Claim 9 (depends on 1)

The package of claim 1, further comprising a package cover over the die between the die and the ceramic substrate, wherein the ceramic substrate has conductive pads coupled to the antenna, wherein the ceramic substrate is attached to the package cover using solder balls on the pads, and wherein the conductive leads comprise the pads and the solder balls.

### Claim 10 (depends on 9)

The package of claim 9, wherein the package cover comprises a redistribution layer having connections to a second die.

### Claim 11 (depends on 9)

The package of claim 9, wherein the conductive leads comprise solder-filled vias.

### Claim 12 (depends on 1)

The package of claim 1, wherein the dielectric ceramic substrate has a loss tangent of less than 0.005.

### Claim 13

A computing system comprising:
a processor;
a user interface; and
a communications chip in a package, the package having a die, a dielectric ceramic substrate over the die, the ceramic substrate being a having a thickness of at least 10 micrometers, wherein the dielectric ceramic substrate has a first surface facing the die, a second surface facing away from the die, and a sidewall surface connecting the first surface to the second surface, an antenna formed on the second surface of the ceramic substrate, the antenna being positioned such that the dielectric of the ceramic increases the resonant frequency of the antenna, a conductive shield layer between the first surface of the ceramic substrate and the die, a mold compound over the die and completely covering the sidewall surface of the ceramic substrate, a redistribution layer formed on a front side of the die and on the mold compound and conductive leads electrically connecting the antenna to the redistribution layer.

### Claim 14 (depends on 13)

The computing system of claim 13, further comprising conductive paths on the ceramic substrate to connect the antenna on the second surface of the substrate to a via connected to the first surface of the substrate.

### Claim 15 (depends on 13)

The computing system of claim 13, further comprising a conductive trace on a third surface of the ceramic substrate between the first surface and the second surface to electrically connect the antenna to the conductive lead proximate the first surface.

### Claim 16

A method comprising:
forming a dielectric ceramic substrate with a thickness of at least 10micrometers, wherein the dielectric ceramic substrate has a first surface, a second surface, and a sidewall surface connecting the first surface to the second surface;
attaching an antenna to the second surface of the ceramic substrate, the antenna being attached such that the dielectric of the ceramic increases the resonant frequency of the antenna;
applying a conductive shield layer on the first surface of the ceramic substrate;
attaching the ceramic substrate to a die, wherein the first surface of the ceramic substrate is facing the die, and the second surface of the ceramic substrate is facing away from the die;
forming a cover over the die and completely covering the sidewall surface of the ceramic substrate;
forming a redistribution layer over the cover and the die; and
electrically connecting the antenna to the die through the redistribution layer.

### Claim 17 (depends on 16)

The method of claim 16, wherein attaching an antenna comprises depositing conductive lines on a surface of the ceramic substrate.

### Claim 18 (depends on 17)

The method of claim 17, wherein forming a cover comprises applying a mold compound over the ceramic substrate and the die and wherein forming a redistribution layer comprises forming a redistribution layer on a front side of the die and on the mold compound.