# US 10,319,686 B2 · Radiation-hard electronic device and method for protecting an electronic device from ionizing radiation

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- Number: US 10,319,686 B2
- Document ID: US10319686B2
- Status: Granted
- Kind: B2
- Application number: 15/198,877
- Filed: 2016-06-30
- Published: 2017-05-18
- Granted: 2019-06-11
- Earliest claimed: 2015-11-18
- Assignees: STMicroelectronics S.r.l.
- Applicants: STMicroelectronics S.R.L.
- Inventors: Ignazio Bruno Mirabella
- Web page: https://patentgrep.com/patent/US10319686B2

## CPC

- H10W 42/25: against alpha rays, e.g. for outer space applications
- H10W 42/20: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
- H10W 76/05: Providing fillings in containers, e.g. gas filling
- H10W 76/47: Solid or gel fillings
- B29C 2043/181: {encapsulated}
- H10D 86/201: {the substrates comprising an insulating layer on a semiconductor body, e.g. SOI (H10D86/40 take precedence)}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 74/476: {Organic materials comprising silicon}
- H10W 76/15: Containers comprising an insulating or insulated base
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- B29C: SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING (making preforms B29B11/00; making laminated products by combining previously unconnected layers which become one product whose layers will remain together B32B37/00 - B32B41/00)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A radiation-hard electronic device including a package structure, a semiconductor chip in a cavity within the package structure, an integrated circuit in the semiconductor chip, and structures for protection from radiation for protecting the integrated circuit from ionizing radiation. The structures for protection from radiation include a protective layer of gel, which occupies at least in part the cavity and coats the semiconductor chip.

## Claims

### Claim 1

A radiation-hard electronic device, comprising:
a package structure;
a semiconductor chip in a cavity within the package structure and including a first face, a second face opposite the first face, and sides extending between the first and second faces, the semiconductor chip further including:
a first semiconductor layer and a second semiconductor layer separated and insulated from one another by a dielectric layer; and
trench-insulation structures which extend through the entire second semiconductor layer from the first face as far as the dielectric layer;
an integrated circuit in the semiconductor chip; and
a first radiation protection structure of a single protective layer of gel which occupies at least in part the cavity and coats the first face and sides of the semiconductor chip to protect the semiconductor chip from ionizing radiation, the single protective layer of gel being the only layer in the radiation-hard electronic device to significantly attenuate the energy of particles of ionizing radiation incident on the semiconductor chip.

### Claim 2 (depends on 1)

The device according to claim 1 wherein the package structure contains lead.

### Claim 3 (depends on 1)

The device according to claim 1 wherein the package structure is of a flat-hermetic-package type.

### Claim 4 (depends on 1)

The device according to claim 1 wherein the semiconductor chip comprises a SOI substrate.

### Claim 5 (depends on 1)

The device according to claim 1 wherein the gel is a silicone gel which occupies at least in part the cavity and coats the semiconductor chip.

### Claim 6 (depends on 5)

The device according to claim 5, wherein the gel contains hydrogen.

### Claim 7 (depends on 6)

The device according to claim 6 wherein a portion of the protective layer coating the semiconductor chip has a thickness not greater than 700 μm.

### Claim 8 (depends on 1)

The device according to claim 1 wherein the trench-insulation structures are bonded to the dielectric layer and delimit laterally respective cells of the second semiconductor layer electrically insulated from remaining portions of the second semiconductor layer.

### Claim 9 (depends on 8)

The device according to claim 8 further comprising a second protection structure formed by the dielectric layer and by the trench-insulation structures.

### Claim 10 (depends on 8)

The device according to claim 8 wherein the integrated circuit comprises a first electronic component and a second electronic component, which are provided in respective and distinct cells of the second semiconductor layer and are operatively coupled to one another.

### Claim 11

A system, comprising:
a control unit; and
an electronic device coupled to the control unit, wherein at least one between the control unit and the electronic device is protected from radiation through a structure including,
a package structure including a substrate and a cover with a cavity formed between the substrate and the cover, the substrate having a surface exposed in the cavity;
a semiconductor chip including a lower surface attached to the surface of the substrate exposed in the cavity, and including a free surface opposite the lower surface and a plurality of side surfaces extending between the lower and free surfaces, the free surface being exposed in the cavity;
an integrated circuit formed in the semiconductor chip; and
a radiation protection structure of a silicone gel coating in the cavity and surrounding the free and side surfaces of the semiconductor chip but not the lower surface attached to the surface of the substrate, the silicone gel coating being in the cavity between the free surface of the semiconductor chip and the cover of the package structure, and the silicone gel coating being the only coating in the radiation protection structure configured to reduce drift currents generated in the semiconductor chip in response to particles of ionizing radiation incident on the silicone gel coating and semiconductor chip.

### Claim 12 (depends on 11)

The system of claim 11 further comprising:
a bus coupled to the control unit and the electronic device;
a memory coupled to the bus;
input/output circuitry coupled to the bus; and
a wireless interface coupled to the bus.

### Claim 13 (depends on 11)

The system of claim 11 wherein the semiconductor chip further comprises:
a first semiconductor layer;
an insulating layer formed on the first semiconductor layer;
a second semiconductor layer formed on the insulating layer, the second semiconductor layer including a first surface adjoining the insulating layer and a second surface opposite the first surface; and
trench-isolation structures formed in the second semiconductor layer, the trench-isolation structures extending through the second semiconductor layer from the first surface to the second surface to form a plurality of electrically isolated cells in the second semiconductor layer.

### Claim 14 (depends on 13)

The system of claim 13 further comprising a plurality of electronic components, each of the electronic components being formed in a separate one of the cells.

### Claim 15

A method, comprising:
bonding a first surface of a semiconductor chip to a substrate, the semiconductor chip including a second surface opposite the first surface and side surfaces extending between the first and second surfaces;
forming a package structure on the bonded semiconductor chip and substrate, the package including a cavity and the second surface of the semiconductor chip being exposed within the cavity; and
coating the second and side surfaces of the semiconductor chip in the cavity with a layer of silicone gel configured to protect the semiconductor chip from ionizing radiation, the layer of silicone gel being the only layer in the package structure configured to protect the semiconductor chip from ionizing radiation.

### Claim 16 (depends on 15)

The method according to claim 15 wherein coating the semiconductor chip with the layer of silicone gel in the cavity comprises coating the semiconductor chip with a layer of silicone gel including hydrogen in the silicone gel.

### Claim 17 (depends on 16)

The method according to claim 16 wherein coating the semiconductor chip in the cavity with the layer of silicone gel comprises forming the layer of silicone gel under low-pressure conditions to reduce the formation of bubbles in the gel.

### Claim 18 (depends on 17)

The method according to claim 17 wherein forming the layer of gel under low-pressure conditions further comprises forming the layer of gel inside the cavity in the presence of a pressure of approximately 50 mbar.