# US 10,319,658 B2 · Electronic component package and method of housing an electronic component > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,319,658 B2 - Document ID: US10319658B2 - Status: Granted - Kind: B2 - Application number: 15/885,129 - Filed: 2018-01-31 - Published: 2018-08-02 - Granted: 2019-06-11 - Earliest claimed: 2017-02-02 - Assignees: Taiyo Yuden Co., Ltd. - Applicants: Taiyo Yuden Co., Ltd. - Inventors: Yasutomo Suga; Masataka Watabe - Web page: https://patentgrep.com/patent/US10319658B2 ## CPC - H10W 74/147: {the encapsulations being multilayered} - H01G 4/1209: {characterised by the ceramic dielectric material (H01G4/1272, H01G4/1281 take precedence)} - H01G 4/1227: {based on alkaline earth titanates} - H01G 4/1272: {Semiconductive ceramic capacitors} - H01G 4/224: Housing; Encapsulation - H01G 4/232: electrically connecting two or more layers of a stacked or rolled capacitor - H01G 4/30: Stacked capacitors (H01G4/33 takes precedence) - H05K 3/303: with surface mounted components (H05K3/32 takes precedence) - H10W 74/019: {using temporary auxiliary substrates (H10W74/017 takes precedence)} - H10W 74/129: {forming a chip-scale package [CSP]} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H01G: CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE (selection of specified materials as dielectric H01B3/00; capacitors having potential barriers H10D1/62, H10K10/10) - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ## Abstract An electronic component package includes: an electronic component that includes a body, the body having a first main surface that is convexly curved along a longitudinal direction, and a second main surface that is concavely curved along the longitudinal direction, a distance between the first main surface and the second main surface being 50 μm or less; a housing portion that includes a plurality of recesses, each of the recesses including a take-out opening and housing the electronic component with the first main surface facing toward the take-out opening; and a sealing portion that covers the take-out openings of the plurality of recesses. ## Claims ### Claim 1 An electronic component package, comprising: a plurality of electronic components each including a body, the body having a first main surface that is convexly curved along a longitudinal direction, and a second main surface that is concavely curved along the longitudinal direction, a distance between the first main surface and the second main surface being 50 μm or less; a carrier tape that includes a plurality of recesses, each of the recesses including a take-out opening and respectively housing an electronic component of the plurality of electronic components with the first main surface facing toward the take-out opening; and a cover tape that covers the take-out openings of the plurality of recesses and is configured to be capable of being peeled off; wherein each electronic component includes a ceramic electronic component, wherein the ceramic electronic component includes a multi-layer ceramic electronic component that is made of insulating ceramics and includes a first cover and a second cover, the first cover forming the first main surface, the second cover forming the second main surface, wherein an angle formed by tangent lines that are tangent to ends of the first main surface in the longitudinal direction is 170° or more and 176° or less, and an angle formed by a virtual line parallel to the longitudinal direction of the multi-layer ceramic capacitor and the tangent line is 2° or more and 5° or less. ### Claim 2 (depends on 1) The electronic component package according to claim 1, wherein the first cover and the second cover are different from each other in particle density of the insulating ceramics. ### Claim 3 (depends on 1) The electronic component package according to claim 1, wherein the first cover and the second cover are different from each other in particle diameter of the insulating ceramics. ### Claim 4 (depends on 1) The electronic component package according to claim 1, wherein the first cover and the second cover are different from each other in content of an additive element therein. ### Claim 5 (depends on 4) The electronic component package according to claim 4, wherein the additive element is at least one element selected from magnesium, manganese, aluminum, calcium, vanadium, chromium, zirconium, molybdenum, tungsten, tantalum, niobium, silicon, boron, yttrium, europium, gadolinium, dysprosium, holmium, erbium, ytterbium, lithium, potassium, and sodium. ### Claim 6 A method of housing an electronic component, comprising: preparing a carrier tape that includes a plurality of recesses, each of the recesses including a take-out opening; preparing a plurality of electronic components, each of the electronic components including a body having a first main surface convexly curved along a longitudinal direction and a second main surface concavely curved along the longitudinal direction, a distance between the first main surface and the second main surface being 50 μm or less; and housing the plurality of electronic components respectively in the plurality of recesses such that each first main surface faces toward the take-out opening corresponding thereto; and covering the take-out openings of the plurality of recesses with a cover tape configured to be capable of being peeled off, wherein each electronic component includes a ceramic electronic component, wherein the ceramic electronic component includes a multi-layer ceramic electronic component that is made of insulating ceramics and includes a first cover and a second cover, the first cover forming the first main surface, the second cover forming the second main surface, wherein an angle formed by tangent lines that are tangent to ends of the first main surface in the longitudinal direction is 170° or more and 176° or less, and an angle formed by a virtual line parallel to the longitudinal direction of the multi-layer ceramic capacitor and the tangent line is 2° or more and 5° or less.