# US 10,319,652 B2 · Semiconductor package with elastic coupler and related methods

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- Number: US 10,319,652 B2
- Document ID: US10319652B2
- Status: Granted
- Kind: B2
- Application number: 15/630,112
- Filed: 2017-06-22
- Published: 2017-10-12
- Granted: 2019-06-11
- Earliest claimed: 2015-02-19
- Assignees: Semiconductor Components Industries, LLC
- Applicants: Semiconductor Components Industries, LLC
- Inventors: Yusheng Lin; Chee Hiong Chew; Francis J. Carney
- Web page: https://patentgrep.com/patent/US10319652B2

## CPC

- H10W 76/153: having interconnections in passages through the insulating or insulated base
- H01R 4/4863: {Coil spring}
- H01R 4/489: {spring force increased by screw, cam, wedge, or other fastening means}
- H10W 70/20: Conductive package substrates serving as an interconnection, e.g. metal plates (leadframes H10W70/40)
- H10W 70/479: {on or in insulating or insulated package substrates, interposers, or redistribution layers}
- H10W 70/658: {for devices provided for in groups H10D8/00 - H10D48/00}
- H10W 72/00: Interconnections or connectors in packages
- H10W 76/15: Containers comprising an insulating or insulated base
- H10W 76/157: having interconnections parallel to the insulating or insulated base
- H10W 76/161: {Containers comprising no base}
- H10W 76/60: Seals
- H10W 90/00: Package configurations
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H10W 95/00: Packaging processes not covered by the other groups of this subclass
- H10W 40/611: {Bolts or screws}
- H10W 72/07236: {Soldering or alloying}
- H10W 72/07354: {changes in dispositions}
- H10W 72/29: Bond pads specially adapted therefor
- H10W 72/347: {Dispositions of multiple die-attach connectors}
- H10W 72/5445: {being orthogonal to a side surface of the chip, e.g. parallel arrangements}
- H10W 72/5524: {comprising aluminium [Al]}
- H10W 72/59: Bond pads specially adapted therefor
- H10W 72/691: {Bond pads specially adapted therefor}
- H10W 72/871: {Bond wires and strap connectors}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 72/926: {Multiple bond pads having different sizes}
- H10W 72/932: {Plan-view shape, i.e. in top view}
- H10W 72/944: {Dispositions of multiple bond pads}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/753: {between laterally-adjacent chips}
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/763: {between laterally-adjacent chips}
- H10W 90/764: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H01R: ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS

## Abstract

Implementations of semiconductor packages may include: a die coupled to a substrate; a housing coupled to the substrate and at least partially enclosing the die within a cavity of the housing, and; a pin fixedly coupled to the housing and electrically coupled with the die, wherein the pin includes a reversibly elastically deformable lower portion configured to compress to prevent a lower end of the pin from lowering beyond a predetermined point relative to the substrate when the housing is lowered to be coupled to the substrate.

## Claims

### Claim 1

A semiconductor package, comprising:
a die coupled to a substrate;
a housing coupled to the substrate and at least partially enclosing the die within a cavity of the housing, and;
a pin fixedly coupled to the housing and electrically coupled with the die, the pin comprising a reversibly elastically deformable lower portion, the reversibly elastically deformable lower portion coupled with a lower end of the pin;
wherein the reversibly elastically deformable lower portion is located in the pin between the housing and the substrate; and
wherein the reversibly elastically deformable lower portion is configured to compress to prevent the lower end of the pin from lowering beyond a predetermined point relative to the lower end of the pin when the housing is lowered to be coupled to the substrate.

### Claim 2 (depends on 1)

The semiconductor package of claim 1, wherein a base of the pin is coupled to the substrate with a spring.

### Claim 3 (depends on 1)

The semiconductor package of claim 1, wherein the pin is fixedly coupled in a top of the housing and is configured to be coupled with the substrate by lowering the housing towards the substrate.

### Claim 4 (depends on 1)

The semiconductor package of claim 1, wherein the reversibly elastically deformable lower portion comprises a spring.

### Claim 5

A semiconductor package, comprising:
at least one die coupled to a substrate;
a housing coupled to the substrate and at least partially enclosing the at least one die within a cavity of the housing, and;
a plurality of pins fixedly coupled in a top of the housing, each of the plurality of pins electrically coupled with one of the at least one die through a connection trace of the substrate, each of the plurality of pins comprising a spring between an upper portion of the pin and a lower portion of the pin;
wherein the spring of each pin biases an upper portion of the pin towards the housing; and
wherein the spring is located in the pin between the housing and the substrate.

### Claim 6 (depends on 5)

The semiconductor package of claim 5, wherein the spring comprises a coil spring.

### Claim 7 (depends on 5)

The semiconductor package of claim 5, wherein the spring of each pin is compressed along a direction substantially parallel with a longest length of the pin.

### Claim 8 (depends on 5)

The semiconductor package of claim 5, wherein the spring of each pin is configured to prevent a contact surface of the pin from lowering beyond a predetermined point relative to the substrate when the housing is lowered towards the substrate.

### Claim 9 (depends on 5)

The semiconductor package of claim 5, wherein the spring is a helical spring.