# US 10,319,641 B2 · Semiconductor device having gate structure

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- Number: US 10,319,641 B2
- Document ID: US10319641B2
- Status: Granted
- Kind: B2
- Application number: 16/127,241
- Filed: 2018-09-11
- Published: 2018-12-27
- Granted: 2019-06-11
- Earliest claimed: 2015-07-01
- Assignees: United Microelectronics Corp.
- Applicants: United Microelectronics Corp.
- Inventors: En-Chiuan Liou; Chao-Hung Lin; Yu-Cheng Tung
- Web page: https://patentgrep.com/patent/US10319641B2

## CPC

- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D 30/024: {of fin field-effect transistors [FinFET]}
- H10D 30/62: Fin field-effect transistors [FinFET]
- H10D 62/115: {Dielectric isolations, e.g. air gaps}
- H10D 64/01326: {Aspects related to lithography, isolation or planarisation of the conductor}
- H10D 84/0151: {Manufacturing their isolation regions}
- H10D 84/0158: {the components including FinFETs}
- H10D 84/834: {comprising FinFETs}
- H10P 50/695: {characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask}
- H10W 10/011: {of isolation regions comprising dielectric materials}
- H10W 10/0145: {of trenches having shapes other than rectangular or V-shape (H10W10/0143 takes precedence)}
- H10W 10/10: Isolation regions comprising dielectric materials
- H10W 10/17: formed using trench refilling with dielectric materials, e.g. shallow trench isolations
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device includes a substrate, a first insulating structure and a gate structure. The substrate includes at least two fin structures protruding from a top surface of the substrate, the substrate includes a first recess and a second recess under the first recess, and the first recess and the second recess are disposed between the fin structures, in which a width of the first recess is larger than a width of the second recess, and the first recess and the second recess form a step structure. The first insulating structure fills the second recess. The gate structure is disposed on the first insulating structure, in which the first recess and the second recess are filled up with the gate structure and the first insulating structure.

## Claims

### Claim 1

A semiconductor device, comprising:
a substrate comprising at least two fin structures protruding from a top surface of the substrate, the substrate comprising a first recess and a second recess under the first recess, and the first recess and the second recess being disposed between the fin structures, wherein a width of the first recess is larger than a width of the second recess, and the first recess and the second recess form a step structure;
a first insulating structure filling the second recess; and
a gate structure disposed on the first insulating structure, wherein the first recess and the second recess are filled up with the gate structure and the first insulating structure.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1, wherein a top surface of the first insulating structure is between a top surface of the substrate and a bottom of the first recess.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1, wherein a top surface of the first insulating structure is between a bottom of the first recess and a bottom of the second recess.

### Claim 4 (depends on 1)

The semiconductor device according to claim 1, wherein the substrate further comprises a shallow trench surrounding the fin structures, and a depth of the shallow trench is smaller a sum of a depth of the first recess and a depth of the second recess.

### Claim 5 (depends on 4)

The semiconductor device according to claim 4, further comprising a second insulating structure disposed in the shallow trench.

### Claim 6 (depends on 1)

The semiconductor device according to claim 1, wherein each fin structure comprises two fin portions and a connecting portion, and in each fin structure, the connecting portion connects an end of one of the fin portions to an end of the other one of the fin portions.