# US 10,319,639 B2 · Thin semiconductor package and related methods

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- Number: US 10,319,639 B2
- Document ID: US10319639B2
- Status: Granted
- Kind: B2
- Application number: 15/679,664
- Filed: 2017-08-17
- Published: 2019-02-21
- Granted: 2019-06-11
- Earliest claimed: 2017-08-17
- Assignees: Semiconductor Components Industries, LLC
- Applicants: Semiconductor Components Industries, LLC
- Inventors: Shutesh Krishnan; Sw Wang; CH Chew; How Kiat Liew; Fui Fui Tan
- Web page: https://patentgrep.com/patent/US10319639B2

## CPC

- H10P 54/00: Cutting or separating of wafers, substrates or parts of devices
- H10D 62/117: {Shapes of semiconductor bodies}
- H10P 50/00: Etching of wafers, substrates or parts of devices
- H10W 20/40: Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W 74/01: Manufacture or treatment
- H10W 74/014: {using batch processing}
- H10W 74/129: {forming a chip-scale package [CSP]}
- H10W 72/0198: {batch processes}
- H10W 72/9413: {on encapsulations}
- H10W 72/944: {Dispositions of multiple bond pads}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

Implementations of a method of forming a semiconductor package may include forming a plurality of notches into a first side of a wafer, the first side of the wafer including a plurality of electrical contacts. The method may also include coating the first side of the wafer and an interior of the plurality of notches with a molding compound, grinding a second side of the wafer to thin the wafer to a desired thickness, forming a back metal on a second side of the wafer, exposing the plurality of electrical contacts through grinding a first side of the molding compound, and singulating the wafer at the plurality of notches to form a plurality of semiconductor packages.

## Claims

### Claim 1

A method of forming a semiconductor package comprising:
forming a plurality of notches into a first side of a wafer, the first side of the wafer comprising a plurality of electrical contacts;
coating the first side of the wafer and an interior of the plurality of notches with a molding compound;
grinding a second side of the wafer to thin the wafer to a desired thickness;
forming a back metal on a second side of the wafer;
exposing the plurality of electrical contacts through grinding a first side of the molding compound; and
singulating the wafer at the plurality of notches to form a plurality of semiconductor packages.

### Claim 2 (depends on 1)

The method of claim 1, further comprising forming a groove through the back metal on the second side of the wafer, coating the second side of the wafer and the back metal with a second molding compound, and grinding the second molding compound to a desired thickness.

### Claim 3 (depends on 1)

The method of claim 1, wherein the plurality of notches are formed using an etching technique.

### Claim 4 (depends on 1)

The method of claim 1, wherein each notch in the plurality of notches is a stepwise notch.

### Claim 5 (depends on 1)

The method of claim 1, wherein the second side is ground to a depth of the plurality of notches.

### Claim 6 (depends on 1)

The method of claim 1, wherein a portion of the wafer separates the back metal and the plurality of notches.

### Claim 7 (depends on 1)

The method of claim 1, wherein the first molding compound is applied using one of a liquid dispensing method, a transfer molding method, and a compression molding method.

### Claim 8 (depends on 1)

The method of claim 1, wherein substantially 90 percent of a back portion of the wafer is removed during grinding the second side of the wafer.

### Claim 9 (depends on 1)

The method of claim 1, wherein the first molding compound is cured between 100 and 200 degrees Celsius with a pressure of substantially 5 psi applied to the second side of the wafer.

### Claim 10

A method of forming a semiconductor package comprising:
forming a plurality of notches into a second side of a wafer opposite a first side of a wafer, the first side of the wafer comprising a plurality of electrical contacts;
coating the first side of the wafer with a first molding compound;
coating the second side of the wafer with a second molding compound;
grinding the second molding compound to a desired thickness;
forming a metal layer over the second molding compound and the second side of the wafer;
exposing the plurality of electrical contacts through grinding a first side of the first molding compound; and
singulating the wafer along the plurality of notches forming a plurality of semiconductor packages.

### Claim 11 (depends on 10)

The method of claim 10, wherein the plurality of notches are formed using an etching technique.

### Claim 12 (depends on 10)

The method of claim 10, wherein the first molding compound is applied using one of a liquid dispensing method, a transfer molding method, and a compression molding method.

### Claim 13 (depends on 10)

The method of claim 10, wherein the first molding compound and the second molding compound are ground using one of a mechanical polishing and a chemical etching technique.