# US 10,319,606 B1 · Chip package assembly with enhanced interconnects and method for fabricating the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,319,606 B1 - Document ID: US10319606B1 - Status: Granted - Kind: B1 - Application number: 15/813,008 - Filed: 2017-11-14 - Granted: 2019-06-11 - Earliest claimed: 2017-11-14 - Assignees: Xilinx, Inc. - Applicants: Xilinx, Inc. - Inventors: Jaspreet Singh Gandhi; Tien-Yu Lee; Henley Liu; Ivor G. Barber; Suresh Ramalingam - Web page: https://patentgrep.com/patent/US10319606B1 ## CPC - H10W 70/099: {Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers} - H10W 70/611: {for connecting multiple chips together} - H10W 70/635: {Through-vias} - H10W 70/698: Semiconductor materials that are electrically insulating, e.g. undoped silicon - H10W 72/00: Interconnections or connectors in packages - H10W 72/0711: {Apparatus therefor} - H10W 72/072: {of bump connectors} - H10W 72/50: Bond wires - H10W 72/851: {Dispositions of multiple connectors or interconnections} - H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs} - H10W 70/69: Insulating materials thereof - H10W 74/00: Encapsulations, e.g. protective coatings - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract An integrated circuit interconnects are described herein that are suitable for forming integrated circuit chip packages. In one example, an integrated circuit interconnect is provided that includes a package substrate having a plurality of solder balls coupled to a plurality of contact pads. The package substrate includes a solder mask having a plurality of stepped openings, a plurality of contact pads, and circuitry disposed in the package substrate and coupled to the plurality of contact pads. The solder mask defines a top side of the package substrate. The stepped openings expose the contact pads through solder mask. ## Claims ### Claim 1 An integrated circuit interconnect comprising: a package substrate having a top side, the package substrate comprising: a body; a plurality of contact pads disposed on the body; circuitry disposed in the package substrate and coupled to the plurality of contact pads; and a solder mask disposed on the body and defining the top side of the package substrate, the solder mask being a single layer of solder mask material, the solder mask having a plurality of stepped openings through the single layer of solder mask material to the contact pads, wherein for each of the stepped openings, a step of the single layer of solder mask material at least partially defines the respective stepped opening, at least a portion of the step of the single layer of solder mask material being disposed directly above a respective one of the contact pads; and a plurality of solder balls, each solder ball disposed in a respective one of the plurality of stepped openings formed in the solder mask and disposed in contact with a respective one of the plurality of contact pads. ### Claim 2 (depends on 1) The integrated circuit interconnect of claim 1 further comprising: an interposer coupled to the package substrate via the solder balls. ### Claim 3 (depends on 1) The integrated circuit interconnect of claim 1, wherein each of the stepped openings comprise: a first sidewall, a first opening diameter of the respective one of the stepped openings being at the first sidewall; and a second sidewall adjacent the respective one of the contact pads, a second opening diameter of the respective one of the stepped openings being at the second sidewall, the first opening diameter being greater than the second opening diameter, the second opening diameter being less than a diameter of the respective one of the contact pads, the second sidewall disposed between the first sidewall and the respective one of the contact pads. ### Claim 4 (depends on 3) The integrated circuit interconnect of claim 3, wherein the first sidewall is flared. ### Claim 5 (depends on 3) The integrated circuit interconnect of claim 3, wherein each of the solder balls has a diameter larger than the second opening diameter but smaller than the first opening diameter. ### Claim 6 A method for forming an interconnect of an integrated circuit package, the method comprising: depositing a solder mask on a body of a package substrate, the package substrate comprising contact pads coupled to circuitry within the body of the package substrate; forming a stepped opening through the solder mask to expose one of the contact pads, a first opening diameter of the stepped opening at the one of the contact pads being less than a second opening diameter of the stepped opening at an exterior of the package substrate; depositing a solder ball in the stepped opening, the solder ball electrically coupled to the one of the contact pads; and attaching the solder ball to a pillar on an interposer, attaching the solder ball comprising reflowing the solder ball, wherein after reflowing the solder ball, a diameter of the solder ball is less than the second opening diameter of the stepped opening. ### Claim 7 (depends on 6) The method of claim 6, wherein forming the stepped opening comprises forming a flared sidewall of the solder mask to at least partially define the stepped opening, forming the flared sidewall comprising performing a leaky chrome photolithography process. ### Claim 8 (depends on 6) The method of claim 6, wherein depositing the solder mask comprises: depositing a first solder mask layer on the body; and depositing a second solder mask layer on the first solder mask layer, the second solder mask layer defining the exterior of the package substrate. ### Claim 9 (depends on 8) The method of claim 8, wherein forming the stepped opening through the solder mask comprises: forming a first sidewall of the stepped opening through the first solder mask layer, the first opening diameter being at the first sidewall; and forming a second sidewall of the stepped opening through the second solder mask layer, the second opening diameter being at the second sidewall. ### Claim 10 (depends on 9) The method of claim 9, wherein forming the second sidewall of the stepped opening comprises: forming a flared sidewall. ### Claim 11 (depends on 6) The method of claim 6, wherein forming the stepped opening through the solder mask comprises: forming the stepped opening in a single layer of solder mask material. ### Claim 12 (depends on 11) The method of claim 11, wherein forming the stepped opening comprises: forming a first sidewall adjacent the one of the contact pads, the first opening diameter being at the first sidewall; and forming a second sidewall distal from the one of the contact pads, the second opening diameter being at the second sidewall, the first sidewall disposed between the second sidewall and the one of the contact pads. ### Claim 13 (depends on 12) The method of claim 12, wherein forming the second sidewall further comprises forming a flared sidewall. ### Claim 14 A package structure comprising: a package substrate comprising: a package contact pad on a body; and a solder mask on the body and defining an exterior of the package substrate, a stepped opening being through the solder mask to the package contact pad, a first opening diameter of the stepped opening at the package contact pad is less than a second opening diameter of the stepped opening at the exterior of the package substrate; an interposer comprising: an interposer contact pad; and a pillar disposed on and extending from the interposer contact pad; and a solder ball attached to the package contact pad through the stepped opening and to the pillar, a largest diameter of the solder ball being less than the second opening diameter. ### Claim 15 (depends on 14) The package structure of claim 14, wherein the solder mask comprises: a first solder mask layer disposed on the body; and a second solder mask layer disposed on the first solder mask layer, the second solder mask layer defining the exterior of the package substrate. ### Claim 16 (depends on 15) The package structure of claim 15, wherein the stepped opening through the solder mask is defined at least in part by: a first sidewall through the first solder mask layer, the first opening diameter being at the first sidewall; and a second sidewall through the second solder mask layer, the second opening diameter being at the second sidewall. ### Claim 17 (depends on 16) The package structure of claim 16, wherein the second sidewall is flared toward the exterior of the package substrate. ### Claim 18 (depends on 14) The package structure of claim 14, wherein the solder mask is a single layer of solder mask material, the stepped opening being through the single layer of solder mask material. ### Claim 19 (depends on 18) The package structure of claim 18, wherein the stepped opening is defined at least in part by: a first sidewall adjacent the package contact pad, the first opening diameter being at the first sidewall; and a second sidewall distal from the package contact pad, the second opening diameter being at the second sidewall. ### Claim 20 (depends on 19) The package structure of claim 19, wherein the second sidewall is flared toward the exterior of the package substrate.