# US 10,319,580 B2 · Compound semiconductor device structures comprising polycrystalline CVD diamond

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- Number: US 10,319,580 B2
- Document ID: US10319580B2
- Status: Granted
- Kind: B2
- Application number: 15/531,462
- Filed: 2015-12-09
- Published: 2017-09-14
- Granted: 2019-06-11
- Earliest claimed: 2014-12-18
- Assignees: RFHIC Corporation
- Applicants: RFHIC Corporation
- Inventors: Firooz Nasser-Faili; Daniel Francis; Frank Yantis Lowe; Daniel James Twitchen
- Web page: https://patentgrep.com/patent/US10319580B2

## CPC

- H10P 14/6902: {composed of carbon, e.g. alpha-C, diamond or hydrogen doped carbon}
- C23C 16/274: {using microwave discharges}
- H10D 62/82: Heterojunctions
- H10D 62/8303: {Diamond}
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10P 14/24: using chemical vapour deposition [CVD]
- H10P 14/2901: {Materials}
- H10P 14/2908: {Nitrides}
- H10P 14/3206: {Carbon, e.g. diamond-like carbon}
- H10P 14/3256: {Microstructure}
- H10P 14/3406: {Carbon, e.g. diamond-like carbon}
- H10P 14/3456: {Polycrystalline}
- H10P 14/6328: {Deposition from the gas or vapour phase}
- H10P 14/6336: {in the presence of a plasma [PECVD]}
- H10P 14/6506: {Formation of intermediate materials}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- C23C: COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL (making metal-coated products by extrusion B21C23/22; covering with metal by connecting pre-existing layers to articles, see the relevant places, e.g. B21D39/00, B23K; metallising of glass C03C; metallising mortars, concrete, artificial stone, ceramics or natural stone C04B41/00; enamelling of, or applying a vitreous layer to, metals C23D; treating metal surfaces or coating of metals by electrolysis or electrophoresis C25D; single-crystal film growth C30B; by metallising textiles D06M11/83; decorating textiles by locally metallising D06Q1/04)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A semiconductor device structure comprising: a layer of compound semiconductor material; and a layer of polycrystalline CVD diamond material, wherein the layer of polycrystalline CVD diamond material is bonded to the layer of compound semiconductor material via a layer of nano-crystalline diamond which is directly bonded to the layer of compound semiconductor material, the layer of nano-crystalline diamond having a thickness in a range 5 to 50 nm and configured such that an effective thermal boundary resistance (TBReff) as measured by transient thermoreflectance at an interface between the layer of compound semiconductor material and the layer of polycrystalline CVD diamond material is no more than 50 m2K/GW.

## Claims

### Claim 1

A semiconductor device structure comprising:
a layer of compound semiconductor material; and
a layer of polycrystalline CVD diamond material,
wherein the layer of polycrystalline CVD diamond material is bonded to the layer of compound semiconductor material via a layer of nano-crystalline diamond which is directly bonded to the layer of compound semiconductor material, the layer of nano-crystalline diamond having a thickness in a range 5 to 50 nm and configured such that an effective thermal boundary resistance (TBReff) as measured by transient thermoreflectance at an interface between the layer of compound semiconductor material and the layer of polycrystalline CVD diamond material is no more than 50 m2K/GW.

### Claim 2 (depends on 1)

A semiconductor device structure according to claim 1, wherein the thickness of the layer of nano-crystalline diamond is in a range 10 to 40 nm.

### Claim 3 (depends on 1)

A semiconductor device structure according to claim 1, wherein the thickness of the layer of nano-crystalline diamond is in a range 15 to 30 nm.

### Claim 4 (depends on 1)

A semiconductor device structure according to claim 1, wherein the layer of nano-crystalline diamond has a volume fraction of voids as measured using transmission electron microscopy imaging of no more than 10%.

### Claim 5 (depends on 4)

A semiconductor device structure according to claim 4, wherein the volume fraction of voids in the layer of nano-crystalline diamond is no more than 8%.

### Claim 6 (depends on 1)

A semiconductor device structure according to claim 1, wherein the layer of nano-crystalline diamond has no voids having a thickness greater than 20 nm in a representative sample comprising an area of at least 200 nm×100 nm.

### Claim 7 (depends on 6)

A semiconductor device structure according to claim 6, wherein the layer of nano-crystalline diamond comprises no voids having a thickness greater than 15 nm in a representative sample comprising an area of at least 200 nm×100 nm.

### Claim 8 (depends on 1)

A semiconductor device structure according to claim 1, wherein the layer of nano-crystalline diamond has no visible voids discernible in transmission electron microscopy imaging in a representative sample comprising an area of at least 200 nm×100 nm.

### Claim 9 (depends on 1)

A semiconductor device structure according to claim 1, wherein the layer of polycrystalline CVD diamond material has a thickness of at least 5 micrometers.

### Claim 10 (depends on 1)

A semiconductor device structure according to claim 1, wherein the layer of polycrystalline CVD diamond material comprises grains having a size greater than 1 micron.

### Claim 11 (depends on 1)

A semiconductor device structure according to claim 1, wherein the effective thermal boundary resistance (TBReff) as measured by transient thermoreflectance at an interface between the layer of compound semiconductor material and the layer of polycrystalline CVD diamond material is no more than 40 m2K/GW.

### Claim 12 (depends on 1)

A semiconductor device structure according to claim 1, wherein the layer of compound semiconductor material comprises a III-V compound semiconductor material.

### Claim 13 (depends on 12)

A semiconductor device structure according to claim 12, wherein the III-V compound semiconductor material is gallium nitride.

### Claim 14 (depends on 1)

A semiconductor device structure according to claim 1, wherein the compound semiconductor layer has one or more of the following characteristics:
a charge mobility of at least 1200 cm2V−1 s−1;
a sheet resistance of no more than 700 Ω/square;
a current leakage of no more than 10−5 amps; and
a maximum power of at least 5 W/mm.

### Claim 15

A semiconductor device structure comprising:
a GaN layer;
a dielectric layer disposed on the GaN layer;
a layer of nano-crystalline diamond disposed on the dielectric layer; and
a layer of polycrystalline CVD diamond material disposed on the layer of nano-crystalline diamond,
wherein the dielectric layer has a thickness in a range 28-100 nm and an effective thermal boundary resistance (TBReff) as measured by transient thermoreflectance at an interface between the GaN layer and the layer of polycrystalline CVD diamond material is 12-50 m2K/GW, and
wherein the layer of nano-crystalline diamond has no voids having a thickness greater than 20 nm in a representative sample comprising an area of at least 200 nm×100 nm.

### Claim 16 (depends on 15)

A semiconductor device structure according to claim 15, wherein the dielectric layer comprises a ceramic material.

### Claim 17 (depends on 15)

A semiconductor device structure according to claim 15, further comprising:
an AlGaN layer, the GaN layer being disposed on the AlGaN layer.

### Claim 18 (depends on 15)

A semiconductor device structure according to claim 15, wherein the layer of nano-crystalline diamond has a volume fraction of voids of no more than 10%.