# US 10,319,460 B2 · Systems and methods utilizing a flexible read reference for a dynamic read window

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- Number: US 10,319,460 B2
- Document ID: US10319460B2
- Status: Granted
- Kind: B2
- Application number: 13/966,679
- Filed: 2013-08-14
- Published: 2015-02-19
- Granted: 2019-06-11
- Earliest claimed: 2013-08-14
- Assignees: Infineon Technologies AG
- Applicants: Infineon Technologies AG
- Inventors: Thomas Kern; Jens Rosenbusch; Ulrich Backhausen; Thomas Nirschl
- Web page: https://patentgrep.com/patent/US10319460B2

## CPC

- G11C 29/50004: {of threshold voltage}
- G06F 11/1048: {using arrangements adapted for a specific error detection or correction feature}
- G06F 11/1666: {where the redundant component is memory or memory area}
- G11B 20/1883: {Methods for assignment of alternate areas for defective areas}
- G11C 16/3495: {Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically}
- G11C 29/021: {in voltage or current generators}
- G11C 29/028: {with adaption or trimming of parameters}
- G11C 29/42: using error correcting codes [ECC] or parity check
- G11C 29/52: Protection of memory contents; Detection of errors in memory contents
- G11C 16/28: using differential sensing or reference cells, e.g. dummy cells
- G11C: STATIC STORES (semiconductor memory devices H10B)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G11B: INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER (recording measured values in a way that does not require playback through a transducer G01D9/00; recording or playback apparatus using mechanically marked tape, e.g. punched paper tape, or using unit records, e.g. punched or magnetically marked cards G06K; transferring data from one type of record carrier to another G06K1/18; circuits for coupling output of reproducer to radio receiver H04B1/20; gramophone pick-ups or like acoustic electromechanical transducers or circuits therefor H04R)

## Abstract

A memory system having a flexible read reference is disclosed. The system includes a memory partition, a failcount component, and a controller. The memory partition includes a plurality of memory cells. The failcount component is configured to generate failcounts in response to read operations of the memory partition. The controller is configured to calibrate a reference value for the memory partition by utilizing the failcounts.

## Claims

### Claim 1

A memory system utilizing a flexible read reference, the system comprising:
a memory partition having a plurality of memory cells, wherein each cell has a cell state voltage based on a read operation;
a failcount component configured to generate failcounts in response to read operations of the memory partition, where the failcounts indicate a number of the memory cells having failed reads; and
a controller configured to generate a calibrated reference value for read operations of the memory partition by utilizing the failcounts from the failcount component, wherein the controller is configured to generate the calibrated reference value by sequentially reducing a modified reference value until the failcount exceeds a fail limit to obtain the calibrated reference value, wherein the modified reference value starts at an initial value, wherein the calibrated reference value is compared with a cell state voltage to determine a cell state.

### Claim 2 (depends on 1)

The system of claim 1, where the plurality of memory cells in the memory partition have been subjected to operational characteristics.

### Claim 3 (depends on 2)

The system of claim 2, wherein the operational characteristics include a number of program/erase cycles.

### Claim 4 (depends on 1)

The system of claim 1, wherein the reference value is a reference current.

### Claim 5 (depends on 1)

The system of claim 1, wherein the reference value is a reference voltage.

### Claim 6 (depends on 1)

The system of claim 1, wherein the failcount component utilizes one or more of checksums, parity bits, cyclic redundancy checks, and error correcting code to generate the failcounts.

### Claim 7 (depends on 1)

The system of claim 1, wherein the failcount component compares known contents with read values to generate the failcounts.

### Claim 8 (depends on 1)

The system of claim 1, wherein the controller is configured to perform the read operations with the modified reference value.

### Claim 9 (depends on 8)

The system of claim 8, wherein the controller is configured to decrease the modified reference value by a step amount until the fail limit or a step limit is reached.

### Claim 10 (depends on 9)

The system of claim 9, wherein the step limit is reached on the modified reference value being decreased to a guardband associated with a current state.

### Claim 11 (depends on 9)

The system of claim 9, wherein the fail limit is zero.

### Claim 12 (depends on 1)

The system of claim 1, wherein the controller is configured to calibrate the reference value on boot or after a program or an erase operation.

### Claim 13

A method of calibrating a memory system, the method comprising:
setting a reference value to an initial value;
sequentially decreasing the reference value by a step amount until a limit is exceeded, wherein the limit includes a step limit and a fail limit;
providing the reference value as a calibrated reference value; and
performing one or more read operations to determine a cell state by comparing a read cell state voltage with the calibrated reference value.

### Claim 14 (depends on 13)

The method of claim 13, wherein sequentially decreasing the reference value includes reducing the reference value by the step amount and reading the memory partition to obtain a failcount.

### Claim 15 (depends on 14)

The method of claim 14, wherein sequentially decreasing the reference value includes comparing the failcount to the limit.

### Claim 16 (depends on 13)

The method of claim 13, wherein the memory system includes a number of memory cells subjected to a threshold shift and wherein the provided calibrated reference value corresponds to the threshold shift.

### Claim 17 (depends on 13)

The method of claim 13, further comprising generating an initial failcount based on the initial value and increasing the reference value on the initial failcount exceeding an acceptable threshold.