# US 10,319,060 B2 · Unified memory systems and methods

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- Number: US 10,319,060 B2
- Document ID: US10319060B2
- Status: Granted
- Kind: B2
- Application number: 14/601,223
- Filed: 2015-01-20
- Published: 2015-07-23
- Granted: 2019-06-11
- Earliest claimed: 2014-01-20
- Assignees: NVIDIA Corporation
- Applicants: Nvidia Corporation
- Inventors: Amit Rao; Ashish Srivastava; Yogesh Kini
- Web page: https://patentgrep.com/patent/US10319060B2

## CPC

- G06T 1/20: Processor architectures; Processor configuration, e.g. pipelining
- G06F 9/5016: {the resource being the memory}
- G06F 12/109: for multiple virtual address spaces, e.g. segmentation (G06F12/1036 takes precedence)
- G06T 1/60: Memory management
- G06T: IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

The present invention facilitates efficient and effective utilization of unified virtual addresses across multiple components. In one embodiment, the presented new approach or solution uses Operating System (OS) allocation on the central processing unit (CPU) combined with graphics processing unit (GPU) driver mappings to provide a unified virtual address (VA) across both GPU and CPU. The new approach helps ensure that a GPU VA pointer does not collide with a CPU pointer provided by OS CPU allocation (e.g., like one returned by “malloc” C runtime API, etc.).

## Claims

### Claim 1

An address allocation process comprising:
allocating by a first processing unit, a physical memory address, of a physical address space of a second processing unit, to the second processing unit;
allocating, by the first processing unit, a virtual address, within a reserved virtual address space of the first processing unit, to the second processing unit, a physical address space of the first processing unit not being allocated to the virtual address; and
causing a processor driver of the second processing unit to map the allocated physical memory address to the virtual address.

### Claim 2 (depends on 1)

The address allocation process of claim 1 wherein an operating system (OS) function is used to allocate the physical memory address.

### Claim 3 (depends on 1)

The address allocation process of claim 1 wherein actual physical pages associated with the first processing unit are not allocated to the virtual address.

### Claim 4 (depends on 1)

The address allocation process of claim 1 wherein the second processing unit is a GPU.

### Claim 5 (depends on 1)

The address allocation process of claim 1 wherein the processor driver is a GPU driver.

### Claim 6 (depends on 1)

The address allocation process of claim 1 wherein the virtual address allocated to the second processing unit is returned to the user.

### Claim 7 (depends on 1)

The address allocation process of claim 1 wherein virtual addresses in the reserved virtual address space of the first processing unit are inaccessible by the second processing unit.

### Claim 8

A system comprising:
a central process unit (CPU);
a graphics processing unit (GPU) coupled to the central processing unit; and
a memory for storing information utilized by the GPU and CPU, wherein a virtual address in a reserved CPU (VA-CPU) virtual address space is allocated to a pointer, a physical address in a GPU (PA-GPU) physical memory space is allocated for storing information associated with the pointer, and the VA-CPU is mapped to the PA-GPU, wherein the mapping of the VA-CPU to the PA-GPU is performed by a driver of the GPU, and wherein a CPU physical memory space is not allocated to the virtual address.

### Claim 9 (depends on 8)

The address allocation system of claim 8 wherein possibility of a GPU virtual address collision with a CPU virtual address is reduced or eliminated.

### Claim 10 (depends on 8)

The address allocation system of claim 8 wherein the VA-CPU is blocked for other use when the VA-CPU is mapped to the PA-GPU.

### Claim 11 (depends on 8)

The address allocation system of claim 8 wherein the reserved CPU virtual address space and a GPU virtual address space are disjoint.

### Claim 12 (depends on 8)

The address allocation system of claim 8 wherein a new virtual address is allocated if the VA-CPU fails to be mapped.

### Claim 13 (depends on 8)

The address allocation system of claim 8 wherein an allocator maintains an internal heap of ranges it has reserved on the CPU and the heap represents the GPU allocations and includes the virtual address.

### Claim 14 (depends on 8)

The address allocation system of claim 8 wherein an allocator or the runtime determines if a virtual address is a GPU allocation or a CPU allocation by looking up a heap.

### Claim 15

A tangible computer readable medium including instructions for the implementation of an address allocation process comprising:
allocating, by a first processing unit, a physical memory address, of a physical address space of a second processing unit, to the second processing unit;
allocating, by the first processing unit, a virtual address, within a reserved virtual address space of the first processing unit, to the second processing unit, a physical address space of the first processing unit not being allocated to the virtual address; and
causing a processor driver of the second processing unit to map the allocated physical memory address to the virtual address.

### Claim 16 (depends on 15)

The tangible computer readable medium of claim 15 wherein the reserved virtual address space of the first processing unit is reserved on demand.

### Claim 17 (depends on 15)

The tangible computer readable medium of claim 15 wherein the reserved virtual address space of the first processing unit is tracked or recorded.

### Claim 18 (depends on 15)

The tangible computer readable medium of claim 15 wherein the first processing unit is a central processing unit (CPU) and the second processing unit is a graphics processing unit (GPU).

### Claim 19 (depends on 15)

The tangible computer readable medium of claim 15 further comprising a deallocation process including:
unmapping the physical memory address from the second processing unit using the processor driver;
calling to an unmap function to deallocate a first processor unit reservation; and
freeing the physical memory address.

### Claim 20 (depends on 15)

The tangible computer readable medium of claim 15 wherein pointer collision is avoided by an operating system (OS) function allocating physical memory pages associated with a GPU without allocating physical pages associated with a CPU.