# US 10,313,613 B2 · High dynamic range image sensors with flicker and fixed pattern noise mitigation > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,313,613 B2 - Document ID: US10313613B2 - Status: Granted - Kind: B2 - Application number: 15/791,626 - Filed: 2017-10-24 - Published: 2019-04-25 - Granted: 2019-06-04 - Earliest claimed: 2017-10-24 - Assignees: Semiconductor Components Industries, LLC - Applicants: Semiconductor Components Industries, LLC - Inventors: Sergey Velichko - Web page: https://patentgrep.com/patent/US10313613B2 ## CPC - H04N 25/58: involving two or more exposures - G01R 31/2635: {Testing light-emitting diodes, laser diodes or photodiodes} - H04N 25/53: Control of the integration time - H04N 25/583: with different integration times - H04N 25/585: with pixels having different sensitivities within the sensor, e.g. fast or slow pixels or pixels having different sizes - H04N 25/589: with different integration times, e.g. short and long exposures - H04N 25/59: by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance - H04N 25/77: Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components - H04N 25/771: comprising storage means other than floating diffusion - H10F 39/803: {Pixels having integrated switching, control, storage or amplification elements} - G01R 19/0084: {Measuring voltage only} - H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION - G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12) - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION ## Abstract An image sensor pixel may include a photodiode coupled to a pixel charge storage via a charge transfer transistor, a charge overflow capacitor coupled to the pixel charge storage via a gain control transistor, and an adjustable reset drain that is coupled to the charge overflow capacitor via a reset transistor. The reset transistor may receive a reset signal that is dynamically adjusted during an acquisition phase to help reduce flicker. The potential barrier of the reset transistor may also be calibrated during readout to reduce fixed pattern noise among different pixels. The image sensor pixel may generate an image using a linear combination of at least three signals read out using the charge overflow capacitor and light flickering mitigation operations. The image may be a high dynamic range image that is generated from at least a low exposure signal and a high exposure signal. ## Claims ### Claim 1 An image sensor pixel, comprising: a photosensitive element; a pixel charge storage node coupled to the photosensitive element; a charge transfer transistor coupled between the photosensitive element and the pixel charge storage node; and a reset transistor coupled to the pixel charge storage node, wherein the reset transistor is configured to receive a dynamically changing reset control signal during an acquisition phase to mitigate flicker, wherein the reset transistor is further configured to receive a reset drain voltage, and wherein the reset drain voltage is pulsed during a readout phase to calibrate a potential barrier of the reset transistor. ### Claim 2 (depends on 1) The image sensor pixel of claim 1, wherein the dynamically changing reset control signal is monotonically decreasing during the acquisition phase. ### Claim 3 (depends on 1) The image sensor pixel of claim 1, further comprising: a power supply line configured to supply a power supply voltage to the image sensor pixel, wherein the reset control signal exhibits an intermediate voltage that is less than the power supply voltage at the beginning of the acquisition phase. ### Claim 4 (depends on 3) The image sensor pixel of claim 3, wherein the reset control signal is pulsed high to the intermediate voltage during the readout phase to calibrate the potential barrier of the reset transistor. ### Claim 5 (depends on 1) The image sensor pixel of claim 1, further comprising: a power supply line configured to supply a power supply voltage to the image sensor pixel, wherein the reset control signal exhibits a first intermediate voltage that is less than the power supply voltage during a first period of the acquisition phase and exhibits a second intermediate voltage that is less than the first intermediate voltage during a second period of the acquisition phase. ### Claim 6 (depends on 1) The image sensor pixel of claim 1, further comprising: a gain control transistor coupled between the pixel charge storage node and the reset transistor; and a capacitor directly coupled to both the gain control transistor and the reset transistor. ### Claim 7 (depends on 6) The image sensor pixel of claim 6, wherein the gain control transistor is turned on during the entirety of the acquisition phase. ### Claim 8 (depends on 6) The image sensor pixel of claim 6, further comprising: readout circuitry configured to capture an overflow signal, a calibration signal, and a photodiode signal proportional to an amount of charge stored in the photosensitive element. ### Claim 9 (depends on 8) The image sensor pixel of claim 8, wherein the readout circuitry is further configured to compare the photodiode signal to a predetermined threshold and to compare the overflow signal with the calibration signal. ### Claim 10 A method of operating an image sensor pixel that includes a photosensitive element, pixel charge storage node, a capacitor storage region, and a reset transistor, the method comprising: with the photosensitive element, accumulating charge during an acquisition phase; coupling the pixel charge storage node to the capacitor storage region during the acquisition phase; and partially activating the reset transistor to fill the pixel charge storage node and the capacitor storage region with a predetermined amount of charge to calibrate a potential barrier of the reset transistor, wherein calibration of the potential barrier of the reset transistor mitigates fixed pattern noise. ### Claim 11 (depends on 10) The method of claim 10, further comprising: supplying a power supply voltage to the image sensor pixel to power the image sensor pixel, wherein partially activating the reset transistor comprises supplying an intermediate voltage that is less than the power supply voltage to a gate terminal of the reset transistor to calibrate the potential barrier of the reset transistor. ### Claim 12 (depends on 10) The method of claim 10, further comprising: supplying an adjustable reset drain voltage to a drain terminal of the reset transistor to calibrate the potential barrier of the reset transistor. ### Claim 13 (depends on 11) The method of claim 11, further comprising: supplying the intermediate voltage to the gate terminal of the reset transistor at the beginning of the acquisition period. ### Claim 14 (depends on 13) The method of claim 13, further comprising: monotonically decreasing the voltage at the gate terminal of the reset transistor throughout the acquisition period to mitigate flicker. ### Claim 15 An image sensor, comprising: an image sensor pixel that comprises: a photosensitive element; a pixel charge storage node coupled to the photosensitive element via a charge transfer transistor; a capacitor storage region coupled to the pixel charge storage node via a gain control transistor; and a reset transistor coupled to the pixel charge storage node, wherein the reset transistor is configured to receive a dynamically changing reset control signal during an acquisition phase, and wherein the charge transfer transistor remains off during the acquisition phase while the reset control signal is dynamically changing; and readout circuitry configured to receive an overflow signal from the image sensor pixel, wherein the overflow signal represents a total amount of charge that is stored in the pixel charge storage and the capacitor storage region at the end of the acquisition phase. ### Claim 16 (depends on 15) The image sensor of claim 15, wherein the readout circuitry is further configured to receive a calibration signal from the image sensor pixel, and wherein the calibration signal represents an amount of charge that is stored in the pixel charge storage and the capacitor storage region during calibration of a potential barrier of the reset transistor. ### Claim 17 (depends on 16) The image sensor of claim 16, wherein the readout circuitry is further configured to receive a photodiode signal from the image sensor pixel, and wherein the photodiode signal represents an amount of charge that is stored in the photosensitive element. ### Claim 18 (depends on 17) The image sensor of claim 17, wherein the readout circuitry is further configured to compare the photodiode signal to a predetermined threshold and to compare the overflow signal to the calibration signal. ### Claim 19 (depends on 17) The image sensor of claim 17, wherein the readout circuitry is further configured to compute a difference between the overflow signal and the calibration signal and to multiply the computed difference by a predetermined gain. ### Claim 20 (depends on 15) The image sensor of claim 15, wherein the reset control signal dynamically decreases according to a linear function during the acquisition phase.