# US 10,312,942 B2 · Parallel bit interleaver

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 10,312,942 B2
- Document ID: US10312942B2
- Status: Granted
- Kind: B2
- Application number: 16/122,466
- Filed: 2018-09-05
- Published: 2018-12-27
- Granted: 2019-06-04
- Earliest claimed: 2011-05-18
- Assignees: Panasonic Corporation
- Applicants: Panasonic Corporation
- Inventors: Mihail Petrov
- Web page: https://patentgrep.com/patent/US10312942B2

## CPC

- H03M 13/2792: {Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing}
- H03M 13/1134: {Full parallel processing, i.e. all bit nodes or check nodes are processed in parallel}
- H03M 13/116: {Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices}
- H03M 13/1165: {QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]}
- H03M 13/255: {with Low Density Parity Check [LDPC] codes}
- H03M 13/27: using interleaving techniques
- H03M 13/271: {Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations}
- H03M 13/296: {Particular turbo code structure}
- H03M 13/356: {Unequal error protection [UEP]}
- H03M 13/6552: {DVB-T2}
- H04L 1/0041: {Arrangements at the transmitter end}
- H04L 1/0045: {Arrangements at the receiver end}
- H04L 1/0058: {Block-coded modulation}
- H04L 1/0061: {Error detection codes}
- H04L 1/0071: {Use of interleaving (interleaving per se H03M13/27)}
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

A bit interleaving method involves applying a bit permutation process to a QC LDPC codeword made up of N cyclic blocks each including Q bits, and dividing the codeword, after the bit permutation process, into a plurality of constellation words each made up of M bits, the codeword being divided into N/M sections, each constellation word being associated with one of the N/M sections, and the bit permutation process being performed such that each of the constellation words includes one bit from each of M different cyclic blocks associated with a given section.

## Claims

### Claim 1

A transmitting method for transmitting a codeword generated based on a low-density parity check coding scheme, the parity-check matrix of the low-density parity check coding scheme having a quasi-cyclic structure, the parity bits of the codeword being interleaved, the transmitting method comprising:
a bit group permutation step of applying a bit group permutation process to a codeword made up of N bit groups each consisting of Q bits, to reorder the bit groups in accordance with a bit group permutation rule defining a reordering of the bit groups;
a bit permutation step of applying a bit permutation process to the codeword after the bit group permutation process, to reorder the bits of the codeword in accordance with a bit permutation rule defining a reordering of the bits;
a dividing step of dividing the codeword after the bit permutation process into a plurality of constellation words, each of the constellation words being made up of M bits;
a modulating step of mapping each of the constellation words to a modulated signal; and
a transmitting step of transmitting a transmitting signal generated from the modulated signal, wherein
N is a multiple of M,
the bit permutation rule defines the reordering of the bits of the codeword after the bit group permutation process, the reordering of the bit permutation rule being equivalent to a column-row permutation process including a writing process and a reading process, the bits of the N bit groups being written into a matrix row-by-row during the writing process, the written bits being read out from the matrix column-by-column during the reading process, the matrix having M rows, the Q bits included in one bit group being written into a same row sequentially.

### Claim 2 (depends on 1)

The transmission method according to claim 1, wherein the quasi-cyclic low-density parity check coding scheme is a repeat-accumulate quasi-cyclic low-density parity check coding scheme.

### Claim 3

A transmitter for transmitting a codeword generated based on a low-density parity check coding scheme, the parity-check matrix of the low-density parity check coding scheme having a quasi-cyclic structure, the parity bits of the codeword being interleaved, the transmitter comprising:
a bit group permutator that, in operation, applies a bit group permutation process to a codeword made up of N bit groups each consisting of Q bits, to reorder the bit groups in accordance with a bit group permutation rule defining a reordering of the bit groups;
a bit permutator that, in operation, applies a bit permutation process to the codeword after the bit group permutation process, to reorder the bits of the codeword in accordance with a bit permutation rule defining a reordering of the bits;
a divider that, in operation, divides the codeword after the bit permutation process into a plurality of constellation words, each of the constellation words being made up of M bits;
a modulator that, in operation, maps each of the constellation words to a modulated signal; and
a transmitter that, in operation, transmits a transmitting signal generated from the modulated signal, wherein
N is a multiple of M,
the bit permutation rule defines the reordering of the bits of the codeword after the bit group permutation process, the reordering of the bit permutation rule being equivalent to a column-row permutation process including a writing process and a reading process, the bits of the N bit groups being written into a matrix row-by-row during the writing process, the written bits being read out from the matrix column-by-column during the reading process, the matrix having M rows, the Q bits included in one bit group being written into a same row sequentially, and
the bit index of the bit in each of the constellation words to which the bits in each of the bit groups are allocated is determined in accordance with the bit group permutation rule.

### Claim 4 (depends on 3)

The transmitter according to claim 3, wherein the quasi-cyclic low-density parity check coding scheme is a repeat-accumulate quasi-cyclic low-density parity check coding scheme.