# US 10,312,914 B2 · Gate driver with serial communication > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,312,914 B2 - Document ID: US10312914B2 - Status: Granted - Kind: B2 - Application number: 15/854,515 - Filed: 2017-12-26 - Published: 2018-11-29 - Granted: 2019-06-04 - Earliest claimed: 2017-05-23 - Assignees: Texas Instruments Incorporated - Applicants: Texas Instruments Incorporated - Inventors: Xiong Li; Toru Tanaka - Web page: https://patentgrep.com/patent/US10312914B2 ## CPC - H03K 19/0952: using Schottky type FET {MESFET}({H03K19/09421, H03K19/09432}, H03K19/096 take precedence) - H02M 7/537: using semiconductor devices only, e.g. single switched pulse inverters - H02M 7/53873: {with digital control} - H03K 5/19: Monitoring patterns of pulse trains (indicating amplitude G01R19/00; indicating frequency G01R23/00; measuring characteristics of individual pulses G01R29/02) - H03K 17/063: {in field-effect transistor switches} - H03K 17/223: {in field-effect transistor switches} - H03K 19/01707: {in asynchronous circuits} - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) ## Abstract A gate driver includes a drive signal input terminal, a drive signal output terminal, a gate drive circuit, and a serial communication interface. The drive signal input terminal is configured to receive a gate drive signal. The gate drive circuit is coupled to the drive signal input terminal and the drive signal output terminal. The gate drive circuit is configured to provide the gate drive signal to the drive signal output terminal. The serial communication interface is coupled to the drive signal input terminal. ## Claims ### Claim 1 A gate driver, comprising: a drive signal input terminal configured to receive a gate drive signal; a drive signal output terminal; a gate drive circuit coupled to the drive signal input terminal and the drive signal output terminal, the gate drive circuit configured to provide the gate drive signal to the drive signal output port; and a serial communication interface coupled to the drive signal input terminal, wherein: the gate drive circuit is configured to amplify the gate drive signal; and the serial communication interface comprises: a data input terminal; and control circuitry configured to assign a value received via the data input terminal to be an address of the serial communication interface responsive to activation of the gate drive signal. ### Claim 2 (depends on 1) The gate driver of claim 1, wherein the control circuitry is configured to enter an address initialization mode and remain in the address initialization mode until the gate drive signal is activated and thereafter deactivated. ### Claim 3 (depends on 2) The gate driver of claim 2, wherein the control circuitry is configured to: transition from the address initialization mode to an operation mode responsive to assignment of the address; and enable operation of the serial communication interface responsive to receipt, via the data input terminal, of an address value that matches the address assigned to the serial communication interface. ### Claim 4 (depends on 1) The gate driver of claim 1, wherein the control circuitry is configured to apply the gate drive signal to enable operation of the serial communication interface during the address initialization mode. ### Claim 5 (depends on 4) The gate driver of claim 4, wherein the control circuitry is configured to apply the signal at the select terminal in conjunction with the gate drive signal to enable operation of the serial communication interface while the serial communication interface is in the address initialization mode. ### Claim 6 (depends on 1) The gate driver of claim 1, wherein the serial communication interface comprises a select terminal, and the control circuitry is configured to apply a signal at the select terminal to enable operation of the serial communication interface after the address is assigned to the serial communication interface. ### Claim 7 A motor drive circuit, comprising: a plurality of power transistors configured to drive an electric motor; and a plurality of gate drivers, one of the gate drivers connected to a control terminal of each of the power transistors, each of the gate drivers comprising: a drive signal input terminal; a gate drive circuit coupled to the drive signal input terminal, the gate drive circuit configured to drive a signal received at the drive signal input terminal to the control terminal of the one of the power transistors connected to the gate driver; a serial communication interface coupled to the gate drive circuit, the serial communication interface comprising: a data input terminal; and control circuitry configured to: enter an address initialization mode during initialization of the gate driver; and remain in the address initialization mode until the signal received at the drive signal input terminal is activated and thereafter deactivated. ### Claim 8 (depends on 7) The motor drive circuit of claim 7, wherein the control circuitry is configured to assign a value received via the data input terminal to be an address of the serial communication interface responsive to the activation of a signal at the drive signal input terminal. ### Claim 9 (depends on 8) The motor drive circuit of claim 8, wherein the control circuitry is configured to transition from the address initialization mode to an operation mode responsive to assignment of the address. ### Claim 10 (depends on 9) The motor drive circuit of claim 9, wherein the control circuitry is configured to enable operation of the serial communication interface responsive to receipt, via the data input terminal, of an address value that matches the address assigned to the serial communication interface. ### Claim 11 (depends on 7) The motor drive circuit of claim 7, wherein the control circuitry is configured to apply the signal at the drive signal input terminal to enable operation of the serial communication interface during the address initialization mode. ### Claim 12 (depends on 7) The motor drive circuit of claim 7, wherein the serial communication interface comprises a select terminal, and the control circuitry is configured to apply the signal at the select terminal to enable operation of the serial communication interface after termination of the address initialization mode. ### Claim 13 (depends on 7) The motor drive circuit of claim 7, wherein the control circuitry is configured to apply the signal at the select terminal in conjunction with the signal at the drive signal input terminal to enable operation of the serial communication interface while the serial communication interface is in the address initialization mode. ### Claim 14 (depends on 7) The motor drive circuit of claim 7, wherein, while in the address initialization mode, the control circuitry is configured to disregard the signal at the data input terminal until the signal at the drive signal input terminal is activated. ### Claim 15 A traction inverter, comprising: a plurality of power transistors configured to drive an electric motor; a plurality of gate drivers, each of the gate drivers connected to a control terminal of one of the power transistors; and a controller comprising a plurality of motor drive terminals, each of the motor drive terminals connected to a drive signal input terminal of one of the gate drivers; wherein each of the gate drivers comprises a serial communication interface coupled to the controller, the serial communication interface comprising: a data input terminal; and control circuitry configured to: enter an address initialization mode during initialization of the gate driver; remain in the address initialization mode until a signal received at the drive signal input terminal is activated and thereafter inactivated; and while in the address initialization mode, assign a value received via the data input terminal to be an address of the serial communication interface. ### Claim 16 (depends on 15) The traction inverter of claim 15, wherein the control circuitry is configured to apply the signal at the drive signal input terminal to enable operation of the serial communication interface during the address initialization mode. ### Claim 17 (depends on 15) The traction inverter of claim 15, wherein the serial communication interface comprises a select terminal coupled to the controller, and the control circuitry is configured to apply the signal at the select terminal to enable operation of the serial communication interface after termination of the address initialization mode. ### Claim 18 (depends on 17) The traction inverter of claim 17, wherein the control circuitry is configured to enable operation of the serial communication interface responsive to receipt, via the data input terminal, of an address value that matches the address assigned to the serial communication interface. ### Claim 19 (depends on 15) The traction inverter of claim 15, wherein the control circuitry is configured to transition from the address initialization mode to an operation mode responsive to assignment of the address.