# US 10,312,910 B2 · Integrated circuit connection device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,312,910 B2 - Document ID: US10312910B2 - Status: Granted - Kind: B2 - Application number: 13/055,580 - Filed: 2009-07-23 - Published: 2011-07-21 - Granted: 2019-06-04 - Earliest claimed: 2008-07-25 - Assignees: EM Microelectronic-Marin SA - Applicants: Yves Theoduloz; Hugo Jaeggi; Lubomir Plavec - Inventors: Yves Theoduloz; Hugo Jaeggi; Lubomir Plavec - Web page: https://patentgrep.com/patent/US10312910B2 ## CPC - H03K 19/00315: {in field-effect transistor circuits} - H03K 19/0027: {in field effect transistor circuits} - H03K 19/018521: {of complementary type, e.g. CMOS} - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract The integrated circuit connection device (1) enables an external component to be connected. The integrated circuit is powered by a supply voltage (VDD) and part of the circuit operates using at least one internal regulated voltage (VREG). The connection device includes two active transistors (N1, P1) of different conductivity connected in series between the supply voltage (VDD) and earth (VSS). The drains of these two active transistors (N1, P1) are connected to each other so as to form an external contact pad (2). The gates of these active transistors are controlled by voltage signals that have the same amplitude (Vesd). The connection device further includes switching means (3) for modifying the control signals (Vesd) applied across the active transistor gates, without exceeding the highest voltage between the supply voltage (VDD) and the internal regulated voltage (VREG). This allows the voltage range of said integrated circuit to be adapted to an external component connected to the external contact pad (2). ## Claims ### Claim 1 An integrated circuit connection device for connecting an external component, said integrated circuit being powered by a supply voltage and one part of the circuit operating using at least one internal regulated voltage, said connection device including two active transistors of different conductivity series connected between the supply voltage and earth, the drains of these two active transistors being connected to each other so as to form an external contact pad, the gates of said active transistors being intended to be controlled by voltage signals having the same amplitude at different times such that the active transistors are opened and closed without any overlap and are not conductive at the same time, wherein the connection device further includes switching means connected to the gates of the active transistors, to the supply voltage, and to said at least one internal regulated voltage, for modifying the amplitude level of the voltage signals applied across the gates of the active transistors, without exceeding the highest voltage between the supply voltage and the internal regulated voltage so as to adapt the voltage level applied to the gates of the active transistors to the voltage level of an external component connected to the external contact pad, wherein the switching means includes selection means for giving the voltage signals to be applied to the gates of said active transistors either the voltage level matching the supply voltage, or the voltage level matching the internal regulated voltage, the higher of the two voltages being selected. ### Claim 2 (depends on 1) The connection device according to claim 1, wherein a first active transistor is of the NMOS type and a second transistor is of the PMOS type. ### Claim 3 (depends on 1) The connection device according to claim 1, wherein the switching means also includes conversion means for adapting the amplitude level of the voltage signals to control the transistors with the selected voltage. ### Claim 4 (depends on 2) The connection device according to claim 2, wherein the switching means also includes conversion means for adapting the amplitude level of the voltage signals to control the transistors with the selected voltage. ### Claim 5 (depends on 1) The connection device according to claim 1, wherein said connection device includes a voltage level shifter receiving at input a first transistor gate control signal which operates at the internal regulated voltage, and supplying at output a first output signal to a control circuit, which will process said first output signal and apply the control signals working at the selected voltage to the transistors. ### Claim 6 (depends on 2) The connection device according to claim 2, wherein said connection device includes a voltage level shifter receiving at input a first transistor gate control signal which operates at the internal regulated voltage, and supplying at output a first output signal to a control circuit, which will process said first output signal and apply the control signals working at the selected voltage to the transistors. ### Claim 7 (depends on 5) The connection device according to claim 5, wherein said connection device includes a second voltage level shifter, receiving at input a second transistor gate control signal which operates at the internal regulated voltage, and supplying at output a second output signal to the control circuit, which will process said second output signal so as to apply the control signals to the transistors to set said transistors in high impedance mode. ### Claim 8 (depends on 6) The connection device according to claim 6, wherein said connection device includes a second voltage level shifter, receiving at input a second transistor gate control signal which operates at the internal regulated voltage, and supplying at output a second output signal to the control circuit, which will process said second output signal so as to apply the control signals to the transistors to set said transistors in high impedance mode. ### Claim 9 (depends on 1) The connection device according claim 1, wherein the voltage level is manually selected. ### Claim 10 (depends on 2) The connection device according claim 2, wherein the voltage level is manually selected. ### Claim 11 (depends on 1) The connection device according to claim 1, wherein the voltage level is selected automatically. ### Claim 12 (depends on 2) The connection device according to claim 2, wherein the voltage level is selected automatically. ### Claim 13 (depends on 2) The connection device according to claim 2, wherein the PMOS transistor includes a well, which is biased at a voltage corresponding to the maximum amplitude value of the voltage signals.