# US 10,312,799 B1 · Offline converter with power factor correction at light loads and method therefor

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- Number: US 10,312,799 B1
- Document ID: US10312799B1
- Status: Granted
- Kind: B1
- Application number: 15/974,392
- Filed: 2018-05-08
- Granted: 2019-06-04
- Earliest claimed: 2018-05-08
- Assignees: Semiconductor Components Industries, LLC
- Applicants: Semiconductor Components Industries, LLC
- Inventors: Joel Turchi; Radim Mlcousek; Lukas Olivik
- Web page: https://patentgrep.com/patent/US10312799B1

## CPC

- H02M 1/4225: {using a non-isolated boost converter}
- H02M 1/38: Means for preventing simultaneous conduction of switches
- H02M 1/0009: {Devices or circuits for detecting current in a converter}
- H02M 1/0032: {Control circuits allowing low power mode operation, e.g. in standby mode}
- H02M 1/0041: {Control circuits in which a clock signal is selectively enabled or disabled}
- H02M 1/0064: {Magnetic structures combining different functions, e.g. storage, filtering or transformation}
- H02M 1/385: {with means for correcting output voltage deviations introduced by the dead time}
- H02M 1/4208: {Arrangements for improving power factor of AC input}
- H02M 3/335: using semiconductor devices only
- Y02B 70/10: Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
- Y02P 80/10: Efficient use of energy, e.g. using compressed air or pressurized fluid as energy carrier
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)
- Y02B: CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02P: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS

## Abstract

In one form, a power factor correction (PFC) controller, comprising includes a regulation circuit, a dead-time detection circuit, and a pulse width modulator. The regulation circuit provides a control voltage in response to a feedback voltage received at a feedback input terminal, wherein the feedback voltage is proportional to an output voltage. The dead-time detection circuit has an input coupled to a zero current detection input terminal, and an output for providing a dead-time signal. The pulse width modulator is responsive to the control voltage and the dead-time signal to provide a drive signal that controls conduction of a switch to improve a power factor of an offline converter, wherein the pulse width modulator modulates both an on-time and a switching period of the drive signal using the dead-time signal in a discontinuous conduction mode.

## Claims

### Claim 1

A power factor correction (PFC) controller, comprising:
a regulation circuit for providing a control voltage in response to a feedback voltage received at a feedback input terminal, wherein said feedback voltage is proportional to an output voltage;
a dead-time detection circuit having an input coupled to a zero current detection input terminal, and an output for providing a dead-time signal; and
a pulse width modulator responsive to said control voltage and said dead-time signal to provide a drive signal that controls conduction of a switch to improve a power factor of an offline converter, wherein said pulse width modulator modulates both an on-time and a switching period of said drive signal using said dead-time signal in a discontinuous conduction mode without substantially changing dead time.

### Claim 2 (depends on 1)

The PFC controller of claim 1, wherein said pulse width modulator modulates both an on-time of said switch and a switching period of said switch according to a dead-time using a ramp signal.

### Claim 3 (depends on 2)

The PFC controller of claim 2, wherein said pulse width modulator comprises:
a ramp generator having a first input for receiving a dead-time signal, a second input for receiving a clock signal, and an output for providing said ramp signal, wherein said ramp generator modulates a slope of said ramp signal in response to said dead-time signal; and
a clock generation circuit having a first input for receiving said ramp signal, a second input for receiving a clamp voltage, and an output for providing said clock signal.

### Claim 4 (depends on 3)

The PFC controller of claim 3, wherein said ramp generator provides said ramp signal at a first slope when said dead-time signal is inactive and at a second slope greater than said first slope when said dead-time signal is active, and resets said ramp signal in response to said clock signal.

### Claim 5 (depends on 3)

The PFC controller of claim 3, wherein:
said pulse width modulator further comprises a valley detection circuit having an input for receiving a zero current detection signal, and an output for providing a valley signal to indicate when a drain-to-source voltage of said switch is in a valley; and
said clock generation circuit further has a third input for receiving said valley signal and activates said clock signal when said ramp signal equals said clamp voltage and said valley signal is active.

### Claim 6 (depends on 3)

The PFC controller of claim 3, wherein:
said pulse width modulator further increases said on-time as a function of the relative duration of said dead-time over a cycle time of said clock signal.

### Claim 7 (depends on 1)

The power factor correction (PFC) controller of claim 1, wherein said pulse width modulator comprises:
a ramp control circuit having an input for receiving said dead-time signal, a first output for providing a ramp signal, and a second output for providing a clock signal, wherein said ramp control circuit modulates a slope of said ramp signal in response to said dead-time signal;
a comparator having a negative input for receiving said control voltage, a positive input for receiving said ramp signal, and an output; and
a latch having an output that is set in response to said clock signal and is reset in response to said output of said comparator; and
a driver having an input coupled to said output of said latch, and an output coupled to a drive terminal for providing a drive signal to a control electrode of said switch.

### Claim 8 (depends on 7)

The PFC controller of claim 7, wherein said ramp control circuit comprises:
a ramp generator having a first input for receiving said dead-time signal, a second input for receiving said clock signal, and an output for providing said ramp signal, wherein said ramp generator modulates a slope of said ramp signal in response to said dead-time signal; and
a clock generation circuit having a first input for receiving said ramp signal, a second input for receiving a clamp voltage, and an output for providing said clock signal.

### Claim 9 (depends on 8)

The PFC controller of claim 8, wherein said ramp generator provides said ramp signal at a first slope when said dead-time signal is inactive and at a second slope greater than said first slope when said dead-time signal is active, and resets said ramp signal in response to said clock signal.

### Claim 10 (depends on 8)

The PFC controller of claim 8, wherein:
the PFC controller further comprises a valley detection circuit having an input for receiving a zero current detection signal, and an output for providing a valley signal to indicate when a drain-to-source voltage of a power factor correction transistor is in a valley; and
said clock generation circuit further has a third input for receiving said valley signal and activates said clock signal when said ramp signal equals said clamp voltage and said valley signal is active.

### Claim 11 (depends on 8)

The PFC controller of claim 8, wherein:
said ramp generator reduces a slope of said ramp signal according to a percentage of time said dead-time signal is inactive to a cycle time of said clock signal.

### Claim 12

An offline converter, comprising:
a rectifier for converting a sinusoidal input voltage into a rectified input voltage;
an inductive element having a first terminal for receiving said rectified input voltage, and a second terminal;
a diode having a first terminal coupled to said second terminal of said inductive element, and a second terminal for providing a bulk voltage for a load;
a bulk capacitor having a first terminal coupled to said second terminal of said diode, and a second terminal coupled to ground;
a switch having a first current electrode coupled to said second terminal of said inductive element, a control terminal, and a second current electrode; and
a PFC controller coupled to said inductive element, said second terminal of said diode, and said control terminal of said switch, wherein said PFC controller modulates a conduction of said switch to make a current through said inductive element in phase with said rectified input voltage, wherein in a discontinuous conduction mode said PFC controller modulates both an on-time of said switch and a switching period of said switch according to a dead-time.

### Claim 13 (depends on 12)

The offline converter of claim 12, wherein said PFC controller modulates both an on-time of said switch and a switching period of said switch according to a dead-time using a ramp signal.

### Claim 14 (depends on 13)

The offline converter of claim 13, wherein said PFC controller comprises:
a ramp generator having a first input for receiving a dead-time signal, a second input for receiving a clock signal, and an output for providing said ramp signal, wherein said ramp generator modulates a slope of said ramp signal in response to said dead-time signal; and
a clock generation circuit having a first input for receiving said ramp signal, a second input for receiving a clamp voltage, and an output for providing said clock signal.

### Claim 15 (depends on 14)

The offline converter of claim 14, wherein said ramp generator provides said ramp signal at a first slope when said dead-time signal is inactive and at a second slope greater than said first slope when said dead-time signal is active, and resets said ramp signal in response to said clock signal.

### Claim 16 (depends on 15)

The offline converter of claim 15, wherein:
said PFC controller further comprises a valley detection circuit having an input for receiving a zero current detection signal, and an output for providing a valley signal to indicate when a drain-to-source voltage of a power factor correction transistor is in a valley; and
said clock generation circuit further has a third input for receiving said valley signal and activates said clock signal when said ramp signal equals said clamp voltage and said valley signal is active.

### Claim 17 (depends on 14)

The offline converter of claim 14, wherein:
said PFC controller further increases said on-time as a function of the relative duration of said dead-time over a cycle time of said clock signal.

### Claim 18

A method for line current shaping to increase a power factor of an offline converter comprising:
rectifying a sinusoidal input voltage into a rectified input voltage;
conducting a current generated from said rectified input voltage from a first terminal to a second terminal of an inductive element;
rectifying a voltage at said second terminal of said inductive element to form a bulk voltage;
filtering said bulk voltage using a bulk capacitor; and
selectively switching a current at said second terminal of said inductive element to ground using a switch, wherein said selectively switching comprises generating a ramp signal and modulating both an on-time and a switching period of said switch according to a dead-time in a discontinuous conduction mode.

### Claim 19 (depends on 18)

The method of claim 18, wherein said modulating comprises:
modulating both said on-time and said switching period of said switch by generating a ramp signal in response to said dead-time in said discontinuous conduction mode.

### Claim 20 (depends on 19)

The method of claim 19, wherein said generating said ramp signal comprises:
generating said ramp signal at a first slope during a first portion of a switching cycle; and
generating said ramp signal at a second slope greater than said first slope during a second portion of said switching cycle.

### Claim 21 (depends on 20)

The method of claim 20, wherein said generating said ramp signal further comprises:
determining a cycle voltage as a value of said ramp signal at a start of a dead time during a first switching cycle; and
changing said ramp signal from said first slope to said second slope in response to said ramp signal exceeding said cycle voltage in a second switching cycle subsequent to said first switching cycle.

### Claim 22 (depends on 21)

The method of claim 21, wherein said determining a value of said ramp signal at a start of a dead time during a first switching cycle comprises:
sampling and holding said value of said ramp signal at said start of said dead time during said first switching cycle.

### Claim 23 (depends on 21)

The method of claim 21, further comprising:
repeating said determining a cycle voltage and said changing said ramp signal from said first slope to said second slope for a plurality of switching cycles.

### Claim 24 (depends on 20)

The method of claim 20, wherein said generating said ramp signal further comprises:
generating said ramp signal at said first slope using a charge current;
determining a start of a dead-time of said switching cycle; and
increasing said charge current in response to said determining said start of said dead-time of said switching cycle.

### Claim 25 (depends on 19)

The method of claim 19 wherein said generating said ramp signal comprises:
entering said discontinuous conduction mode in response to said switching period being less than a period of said ramp signal.

### Claim 26 (depends on 25)

The method of claim 25 wherein simultaneously modulating both said on-time and said switching period of said switching in said discontinuous conduction mode comprises:
simultaneously modulating both said on-time and said switching period of said switching in said discontinuous conduction mode in response to a level of a load.