# US 10,312,437 B2 · Memory devices including phase change material elements

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 10,312,437 B2
- Document ID: US10312437B2
- Status: Granted
- Kind: B2
- Application number: 15/682,040
- Filed: 2017-08-21
- Published: 2017-11-30
- Granted: 2019-06-04
- Earliest claimed: 2008-08-21
- Assignees: Ovonyx Memory Technology, LLC
- Applicants: Ovonyx Memory Technology, LLC
- Inventors: Jun Liu
- Web page: https://patentgrep.com/patent/US10312437B2

## CPC

- H10N 70/231: {based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect}
- H10B 63/80: {Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays}
- H10N 70/063: {by etching of pre-deposited switching material layers, e.g. lithography}
- H10N 70/066: {by filling of openings, e.g. damascene method}
- H10N 70/826: {adapted for essentially vertical current flow, e.g. sandwich or pillar type devices}
- H10N 70/841: {Electrodes}
- H10N 70/8825: {Selenides, e.g. GeSe}
- H10N 70/8828: {Tellurides, e.g. GeSbTe}
- H10N 70/884: {based on at least one element of group IIIA, IVA or VA, e.g. elemental or compound semiconductors (compounds of sulfur, selenium or tellurium, e.g. chalcogenides H10N70/882; oxides or nitrides H10N70/883)}
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

Memory devices having a plurality of memory cells, with each memory cell including a phase change material having a laterally constricted portion thereof. The laterally constricted portions of adjacent memory cells are vertically offset and positioned on opposite sides of the memory device. Also disclosed are memory devices having a plurality of memory cells, with each memory cell including first and second electrodes having different widths. Adjacent memory cells have the first and second electrodes offset on vertically opposing sides of the memory device. Methods of forming the memory devices are also disclosed.

## Claims

### Claim 1

A memory device, comprising:
memory cells, at least one memory cell of the memory cells comprising a phase change material element over a first electrode, each phase change material element comprising a programmable volume having an interface with the first electrode at a single location, and the programmable volumes of adjacent phase change material elements disposed at opposite ends of the memory cells.

### Claim 2 (depends on 1)

The memory device of claim 1, further comprising second electrodes over each of the phase change material elements.

### Claim 3 (depends on 2)

The memory device of claim 2, wherein the programmable volume of a first phase change material element is in direct contact with the first electrode and the programmable volume of a second phase change material element is in direct contact with the second electrode.

### Claim 4 (depends on 2)

The memory device of claim 2, wherein the programmable volumes of adjacent phase change material elements are in alternating contact with the first electrodes and the second electrodes.

### Claim 5 (depends on 2)

The memory device of claim 2, wherein each of the programmable volumes has an interface with the second electrode at a single location.

### Claim 6 (depends on 1)

The memory device of claim 1, wherein the interface between the programmable volume and the first electrode comprises a planar interface.

### Claim 7

A memory device, comprising:
memory cells, at least one memory cell of the memory cells comprising a phase change material element over an electrode, each phase change material element comprising a programmable volume and the programmable volumes of adjacent phase change material elements vertically staggered relative to one another.

### Claim 8 (depends on 7)

The memory device of claim 7, wherein a bit-to-bit distance between adjacent phase change material elements is maximized.

### Claim 9 (depends on 7)

The memory device of claim 7, wherein the programmable volumes of adjacent phase change material elements are disposed at opposite ends of the memory cells.

### Claim 10 (depends on 7)

The memory device of claim 7, wherein the phase change material elements have a non-uniform width.

### Claim 11

A method of forming a memory device, the method comprising:
forming memory cells, at least one memory cell of the memory cells comprising a phase change material element over a first electrode, each phase change material element comprising a programmable volume having an interface with the first electrode at a single location, and the programmable volumes of adjacent phase change material elements disposed at opposite ends of the memory cells.

### Claim 12

A method of forming a memory device, the method comprising:
forming memory cells, at least one memory cell of the memory cells comprising a phase change material element over an electrode, each phase change material element comprising a programmable volume and the programmable volumes of adjacent phase change material elements vertically staggered relative to one another.