# US 10,312,407 B2 · Light-emitting device and manufacturing method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,312,407 B2 - Document ID: US10312407B2 - Status: Granted - Kind: B2 - Application number: 16/041,398 - Filed: 2018-07-20 - Published: 2018-12-06 - Granted: 2019-06-04 - Earliest claimed: 2016-05-11 - Assignees: Epistar Corporation - Applicants: Epistar Corporation - Inventors: Cheng-Feng Yu; Ching-Yuan Tsai; Yao-Ru Chang; Hsin-Chan Chung; Shih-Chang Lee; Wen-Luh Liao; Cheng-Hsing Chiang; Kuo-Feng Huang; Hsu-Hsuan Teng; Hung-Ta Cheng; Yung-Fu Chang - Web page: https://patentgrep.com/patent/US10312407B2 ## CPC - H10H 20/812: within the light-emitting regions, e.g. having quantum confinement structures - H10H 20/018: {Bonding of wafers} - H10H 20/811: having quantum effect structures or superlattices, e.g. tunnel junctions - H10H 20/824: comprising only Group III-V materials, e.g. GaP - H10H 20/833: Transparent materials - H10H 20/841: Reflective coatings, e.g. dielectric Bragg reflectors - H10H 20/856: Reflecting means - H10H 20/857: Interconnections, e.g. lead-frames, bond wires or solder balls - H10H 20/8582: {characterised by their shape} - H10H 20/032: {of electrodes} - H10H 20/0364: {of interconnections} - H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS ## Abstract A light-emitting device is provided. The light-emitting device comprises a substrate; an insulating layer on the substrate, wherein the insulating layer comprises a first hole; a light-emitting stack on the insulating layer and comprising an active region comprising a top surface, wherein the top surface comprises a first part and a second part; and an opaque layer covering the first part of the top surface and exposing the second part of the top surface, wherein the second part is directly above the first hole. ## Claims ### Claim 1 A semiconductor device, comprising: a substrate; a semiconductor stack comprising an active region, a sidewall, and a top surface away from the substrate, and from a top view of the semiconductor device, the top surface comprising a first part and a second part surrounded by the first part; a bonding structure between the substrate and the semiconductor stack; an electrode covering the first part and the sidewall and exposing the second part; and an insulating layer between the bonding structure and the electrode. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein the insulating layer has a first portion overlapping with the semiconductor stack and a second portion exposed from the semiconductor stack. ### Claim 3 (depends on 2) The semiconductor device according to claim 2, further comprising a sidewall insulating layer connecting to the second portion of the insulating layer. ### Claim 4 (depends on 3) The semiconductor device according to claim 3, wherein the sidewall insulating layer is formed between the sidewall of the semiconductor stack and the electrode. ### Claim 5 (depends on 1) The semiconductor device according to claim 1, wherein an area of the first part is larger than an area of the second part. ### Claim 6 (depends on 1) The semiconductor device according to claim 1, wherein the top surface has an edge spaced apart from the second part by a distance. ### Claim 7 (depends on 1) The semiconductor device according to claim 1, further comprising a reflective layer between the insulating layer and the substrate. ### Claim 8 (depends on 7) The semiconductor device according to claim 7, wherein from a cross section of the semiconductor device, the top surface has a first width and the reflective layer has a second width larger than the first width. ### Claim 9 (depends on 7) The semiconductor device according to claim 7, wherein the reflective layer directly connects to the bonding structure. ### Claim 10 (depends on 7) The semiconductor device according to claim 7, wherein from a cross section of the semiconductor device, the bonding structure has a third width and the reflective layer has a second width substantially equal to the third width. ### Claim 11 (depends on 1) The semiconductor device according to claim 1, wherein the bonding structure comprises a first bonding layer and a second bonding layer having a material different from that of the first bonding layer. ### Claim 12 (depends on 1) The semiconductor device according to claim 1, wherein the insulating layer is between the bonding structure and the active region. ### Claim 13 (depends on 1) The semiconductor device according to claim 1, wherein from a cross section of the semiconductor device, the top surface has a first width and the substrate has a fourth width larger than the first width. ### Claim 14 (depends on 1) The semiconductor device according to claim 1, wherein the bonding structure comprises gold (Au), indium (In) or tin (Sn). ### Claim 15 A semiconductor device, comprising: a substrate; a semiconductor stack comprising an active region and a top surface, and the top surface comprising a first part and a second part surrounded by the first part; a bonding structure between the substrate and the semiconductor stack; an electrode on the semiconductor stack and defining a first hole aligned with the second part; and a protective layer formed in the hole. ### Claim 16 (depends on 15) The semiconductor device according to claim 15, further comprising an insulating layer between the bonding structure and the electrode. ### Claim 17 (depends on 15) The semiconductor device according to claim 15, wherein the top surface has an edge spaced apart from the second part by a distance. ### Claim 18 (depends on 15) The semiconductor device according to claim 15, wherein the first hole has a circle shape. ### Claim 19 (depends on 15) The semiconductor device according to claim 15, further comprising a second hole formed in the protective layer. ### Claim 20 (depends on 15) The semiconductor device according to claim 15, wherein from a cross section of the semiconductor device, the top surface has a first width and the substrate has a fourth width larger than the first width.