# US 10,312,382 B2 · Quenching circuit

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 10,312,382 B2
- Document ID: US10312382B2
- Status: Granted
- Kind: B2
- Application number: 15/927,350
- Filed: 2018-03-21
- Published: 2018-09-27
- Granted: 2019-06-04
- Earliest claimed: 2017-03-22
- Assignees: Hongik University Industry-Academia Cooperation Foundation
- Applicants: Hongik University Industry-Academia Cooperation Foundation
- Inventors: Ho Young Cha; Jongik Kang
- Web page: https://patentgrep.com/patent/US10312382B2

## CPC

- H10F 77/959: {for devices working in avalanche mode}
- H10F 30/225: the potential barrier working in avalanche mode, e.g. avalanche photodiodes
- H10F 77/1226: comprising multiple Group IV elements, e.g. SiC
- H10F 77/1246: {III-V nitrides, e.g. GaN}
- H10F 77/334: {for shielding light, e.g. light blocking layers or cold shields for infrared detectors}
- Y02E 10/50: Photovoltaic [PV] energy
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- Y02E: REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION

## Abstract

Disclosed is a quenching circuit including an avalanche photodiode and a quenching diode applying a bias voltage to the avalanche photodiode. Since the quenching circuit includes the quenching diode instead of a quenching resistor, the avalanche photodiode can quickly recover to linear mode from Geiger mode, and the bias voltage applied to the avalanche photodiode is stably maintained even though a current level of the avalanche photodiode fluctuates according to the intensity of incident light.

## Claims

### Claim 1

A quenching circuit including an avalanche photodiode and a quenching diode applying a bias voltage to one terminal of the avalanche photodiode, the quenching circuit comprising:
a first p-type semiconductor layer;
a first i-type semiconductor layer provided on an upper surface of the first p-type semiconductor layer;
a first n-type semiconductor layer provided on an upper surface of the first i-type semiconductor layer;
a second p-type semiconductor layer provided on a portion of the upper surface of the first n-type semiconductor layer; and
a pair of metal electrodes respectively serving as a first electrode provided under a lower surface of the first p-type semiconductor layer and a second electrode provided on an upper surface of the second p-type semiconductor layer,
wherein the avalanche photodiode includes the first p-type semiconductor layer, the first i-type semiconductor layer, and the first n-type semiconductor layer, and has a light-receiving region defined as a portion of the upper surface of the first n-type semiconductor layer, the portion not being covered by the second p-type semiconductor layer, and
wherein the quenching diode includes the second p-type semiconductor layer and the first n-type semiconductor layer.

### Claim 2 (depends on 1)

The quenching circuit according to claim 1, further comprising a second i-type semiconductor layer provided between the first n-type semiconductor layer and the second p-type semiconductor layer provided on the upper surface of the first n-type semiconductor layer wherein the second i-type semiconductor layer is provided to cover a portion of the upper surface of the first n-type semiconductor layer,
wherein the light-receiving region of the avalanche photodiode is defined as a portion of the upper surface of the first n-type semiconductor layer, the portion not being covered by the second i-type semiconductor layer, and
wherein the quenching diode is a PIN diode comprising the second p-type semiconductor layer, the second i-type semiconductor layer, and the first n-type semiconductor layer.

### Claim 3 (depends on 2)

The quenching circuit according to claim 2, wherein each of the first p-type semiconductor layer, the first i-type semiconductor layer, the first n-type semiconductor layer, the second p-type semiconductor layer, and the second i-type semiconductor layer is an SiC-based semiconductor layer.

### Claim 4 (depends on 2)

The quenching circuit according to claim 2, wherein each of the first p-type semiconductor layer, the first i-type semiconductor layer, the first n-type semiconductor layer, the second p-type semiconductor layer, and the second i-type semiconductor layer is a GaN-based semiconductor layer.

### Claim 5

A quenching circuit including an avalanche photodiode and a quenching diode applying a bias voltage to one terminal of the avalanche photodiode, the quenching circuit comprising:
a first p-type semiconductor layer;
a first i-type semiconductor layer provided on an upper surface of the first p-type semiconductor layer;
a first n-type semiconductor layer provided on an upper surface of the first i-type semiconductor layer;
a second n−-type semiconductor layer provided on a portion of the first n-type semiconductor layer;
a Schottky metal layer provided on an upper surface of the second n−-type semiconductor layer; and
a pair of metal electrode respectively serving as a first electrode provided under a lower surface of the first p-type semiconductor layer and a second electrode provided on an upper surface of the Schottky metal layer,
wherein the avalanche photodiode is a PIN diode comprising the first p-type semiconductor layer, the first i-type semiconductor layer, and the first n-type semiconductor layer, and having a light-receiving region defined as a portion of the upper surface of the first n-type semiconductor layer, the portion being uncovered by the second n−-type semiconductor layer, and
wherein the quenching diode is a Schottky diode comprising the Schottky metal layer, the second n−-type semiconductor layer, and the first n-type semiconductor layer.

### Claim 6 (depends on 5)

The quenching circuit according to claim 5, wherein each of the first p-type semiconductor layer, the first i-type semiconductor layer, the first n-type semiconductor layer, and the second n−-type semiconductor layer is an SiC-based semiconductor layer.

### Claim 7 (depends on 5)

The quenching circuit according to claim 5, wherein each of the first p-type semiconductor layer, the first i-type semiconductor layer, the first n-type semiconductor layer, and the second n−-type semiconductor layer is a GaN-based semiconductor layer.

### Claim 8 (depends on 5)

The quenching circuit according to claim 5, wherein the Schottky metal layer is made of any one of nickel (Ni), titanium (Ti), aluminum (Al), and tungsten (W).

### Claim 9

A quenching circuit including an avalanche photodiode and a quenching diode applying a bias voltage to one terminal of the avalanche photodiode, the quenching circuit comprising:
a first n-type semiconductor layer;
a first p-type semiconductor layer provided on an upper surface of the first n-type semiconductor layer and provided with a first hole through which a portion of the first n-type semiconductor layer is exposed; and
a pair of metal layers respectively serving as a first electrode provided on an upper surface of a first region of the first p-type semiconductor layer that is divided into the first region and a second region by the first hole serving as a boundary between the first region and the second region, and a second electrode provided on an upper surface of the second region of the first p-type semiconductor layer,
wherein the avalanche photodiode includes the first region of the first p-type semiconductor layer and the first n-type semiconductor layer and has a light-receiving region defined as the upper surface of the first region of the first p-type semiconductor layer, and
wherein the quenching diode includes the second region of the first p-type semiconductor layer and the first n-type semiconductor layer.

### Claim 10 (depends on 9)

The quenching circuit according to claim 9, further comprising a first i-type semiconductor layer provided between the first n-type semiconductor layer and the first p-type semiconductor layer, in which the first i-type semiconductor layer is provided with a second hole perpendicularly extending from the first hole formed in the first p-type semiconductor layer,
wherein the avalanche photodiode is a PIN diode comprising the first region of the first p-type semiconductor layer, a first region of the first i-type semiconductor layer that is divided into the first region and a second region by the second hole serving as a boundary between the first region and the second region, and the first n-type semiconductor layer, and
the quenching diode is a PIN diode comprising the second region of the first p-type semiconductor layer, the second region of the first i-type semiconductor layer, and the first n-type semiconductor layer.

### Claim 11 (depends on 10)

The quenching circuit according to claim 10, wherein each of the first n-type semiconductor layer, the first i-type semiconductor layer, and the first p-type semiconductor layer is an SiC-based semiconductor layer.

### Claim 12 (depends on 10)

The quenching circuit according to claim 10, wherein each of the first n-type semiconductor layer, the first i-type semiconductor layer, and the first p-type semiconductor layer is a GaN-based semiconductor layer.