# US 10,312,349 B2 · Reducing resistance of bottom source/drain in vertical channel devices

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- Number: US 10,312,349 B2
- Document ID: US10312349B2
- Status: Granted
- Kind: B2
- Application number: 15/980,789
- Filed: 2018-05-16
- Published: 2018-09-20
- Granted: 2019-06-04
- Earliest claimed: 2017-03-13
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Shogo Mochizuki; Junli Wang
- Web page: https://patentgrep.com/patent/US10312349B2

## CPC

- H10D 30/025: {of vertical IGFETs (of VDMOS H10D30/0291; of vertical TFTs H10D30/0318)}
- H10D 30/031: {of thin-film transistors [TFT]}
- H10D 30/0318: {of vertical TFTs}
- H10D 30/62: Fin field-effect transistors [FinFET]
- H10D 30/63: Vertical IGFETs (H10D30/66 {, H10D30/6728, H10D30/689, H10D30/693} take precedence)
- H10D 30/6713: {characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes}
- H10D 30/6728: {Vertical TFTs}
- H10D 30/6735: {having gates fully surrounding the channels, e.g. gate-all-around}
- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 62/83: being Group IV materials, e.g. B-doped Si or undoped Ge
- H10D 64/015: {removing at least parts of gate spacers, e.g. disposable spacers}
- H10D 64/017: {using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes}
- H10D 64/252: {for vertical or pseudo-vertical devices}
- H10D 64/62: Electrodes ohmically coupled to a semiconductor
- H10D 84/017: {Manufacturing their source or drain regions, e.g. silicided source or drain regions}
- H10D 84/0186: {Manufacturing their interconnections or electrodes, e.g. source or drain electrodes}
- H10D 84/0195: {the components including vertical IGFETs}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D 62/832: being Group IV materials comprising two or more elements, e.g. SiGe
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

During a fabrication of a semiconductor device, a recess is created in a substrate material disposed along a direction of a plane of fabrication. A layer of a removable material is formed in the recess. A bottom layer is formed above the layer of removable material. A vertical channel above the bottom layer is formed in a direction substantially orthogonal to the direction of the plane of fabrication. A gate is formed using a metal above the bottom layer and relative to the vertical channel. A tunnel is created under the bottom layer by removing the removable material from under the bottom layer such that the backside of the bottom layer forms a ceiling of the tunnel. The tunnel is filled using a conductive material such that the conductive material makes electrical contact with the backside of the bottom layer.

## Claims

### Claim 1

A computer usable program product comprising one or more computer-readable storage devices, and program instructions stored on at least one of the one or more storage devices, the stored program instructions comprising:
program instructions to create, during a fabrication of a semiconductor device, in a substrate material disposed along a direction of a plane of fabrication, a recess;
program instructions to form, in the recess, a layer of a removable material;
program instructions to form, above the layer of removable material, a bottom layer, wherein a backside of the bottom layer is a side of the bottom layer that faces the layer of removable material;
program instructions to form, in a direction substantially orthogonal to the direction of the plane of fabrication, a vertical channel above the bottom layer;
program instructions to form, above the bottom layer and relative to the vertical channel, a gate using a metal;
program instructions to create a tunnel under the bottom layer by removing the removable material from under the bottom layer such that the backside of the bottom layer forms a ceiling of the tunnel;
program instructions to fill the tunnel using a conductive material such that the conductive material makes electrical contact with the backside of the bottom layer; and
program instructions to electrically connect a contact with the conductive material filled in the tunnel to form an electrical connection with the backside of the bottom layer.

### Claim 2 (depends on 1)

The computer usable program product of claim 1, further comprising:
program instructions to deposit, without obstructing the tunnel, a metal on inside surfaces of the tunnel, the depositing shrinking an opening of the tunnel but leaving the tunnel open end-to-end, and wherein the filling occurs after the depositing of the metal on the inside surfaces of the tunnel such that the conductive material being filled makes electrical contact with the deposited metal at least on the ceiling of the tunnel.

### Claim 3 (depends on 1)

The computer usable program product of claim 1, wherein the conductive material is a silicide of a metal.

### Claim 4 (depends on 3)

The computer usable program product of claim 3, wherein the metal is one of Titanium, Cobalt, Nickel, Nickel Platinum alloy, and Tungsten.

### Claim 5 (depends on 1)

The computer usable program product of claim 1, wherein the program instructions to create the tunnel executes after the program instructions to form the gate, wherein the program instructions to form the gate employs a temperature that is destructive to a second contact when the second contact is placed on the bottom layer prior to the forming the gate.

### Claim 6 (depends on 1)

The computer usable program product of claim 1, further comprising:
program instructions to form a first shallow trench isolation (STI) structure on one side of the bottom layer and the layer of the removable material;
program instructions to form a second STI structure on an opposite side of the bottom layer and the layer of the removable material; and
program instructions to expose a third side of the layer of removable material for the creating the tunnel.

### Claim 7 (depends on 1)

The computer usable program product of claim 1, further comprising:
program instructions to form a hard mask on top of the vertical channel; forming at least one spacer layer;
program instructions to form at least one high resistance (high-k) layer; and
program instructions to form at least one work function metal (WFM) layer.

### Claim 8 (depends on 1)

The computer usable program product of claim 1, further comprising:
program instructions to form above the vertical channel a top source/drain (S/D), wherein the bottom layer is a bottom S/D, and wherein an electrical current flows between the top S/D and the bottom S/D through the vertical channel in the direction substantially orthogonal to the direction of the plane of fabrication.

### Claim 9 (depends on 1)

The computer usable program product of claim 1, wherein the removable material is Silicon Germanium (Site).

### Claim 10 (depends on 1)

The computer usable program product of claim 1, wherein the vertical channel device is a vertical fin Field Effect Transistor (vertical finFET).

### Claim 11 (depends on 1)

The computer usable program product of claim 1, wherein the computer usable code is stored in a computer readable storage device in a data processing system, and wherein the computer usable code is transferred over a network from a remote data processing system.

### Claim 12 (depends on 1)

The computer usable program product of claim 1, wherein the computer usable code is stored in a computer readable storage device in a server data processing system, and wherein the computer usable code is downloaded over a network to a remote data processing system for use in a computer readable storage device associated with the remote data processing system.

### Claim 13

A computer system comprising one or more processors, one or more computer-readable memories, and one or more computer-readable storage devices, and program instructions stored on at least one of the one or more storage devices for execution by at least one of the one or more processors via at least one of the one or more memories, the stored program instructions comprising:
program instructions to create, during a fabrication of a semiconductor device, in a substrate material disposed along a direction of a plane of fabrication, a recess;
program instructions to form, in the recess, a layer of a removable material;
program instructions to form, above the layer of removable material, a bottom layer, wherein a backside of the bottom layer is a side of the bottom layer that faces the layer of removable material;
program instructions to form, in a direction substantially orthogonal to the direction of the plane of fabrication, a vertical channel above the bottom layer;
program instructions to form, above the bottom layer and relative to the vertical channel, a gate using a metal;
program instructions to create a tunnel under the bottom layer by removing the removable material from under the bottom layer such that the backside of the bottom layer forms a ceiling of the tunnel;
program instructions to fill the tunnel using a conductive material such that the conductive material makes electrical contact with the backside of the bottom layer; and
program instructions to electrically connect a contact with the conductive material filled in the tunnel to form an electrical connection with the backside of the bottom layer.

### Claim 14 (depends on 13)

The computer system of claim 13, further comprising:
program instructions to deposit, without obstructing the tunnel, a metal on inside surfaces of the tunnel, the depositing shrinking an opening of the tunnel but leaving the tunnel open end-to-end, and wherein the filling occurs after the depositing of the metal on the inside surfaces of the tunnel such that the conductive material being filled makes electrical contact with the deposited metal at least on the ceiling of the tunnel.

### Claim 15 (depends on 13)

The computer system of claim 13, wherein the conductive material is a silicide of a metal.

### Claim 16 (depends on 15)

The computer system of claim 15, wherein the metal is one of Titanium, Cobalt, Nickel, Nickel Platinum alloy, and Tungsten.

### Claim 17 (depends on 13)

The computer system of claim 13, wherein the program instructions to create the tunnel executes after the program instructions to form the gate, wherein the program instructions to form the gate employs a temperature that is destructive to a second contact when the second contact is placed on the bottom layer prior to the forming the gate.

### Claim 18 (depends on 13)

The computer system of claim 13, further comprising:
program instructions to form a first shallow trench isolation (STI) structure on one side of the bottom layer and the layer of the removable material;
program instructions to form a second STI structure on an opposite side of the bottom layer and the layer of the removable material; and
program instructions to expose a third side of the layer of removable material for the creating the tunnel.

### Claim 19 (depends on 13)

The computer system of claim 13, further comprising:
program instructions to form a hard mask on top of the vertical channel; forming at least one spacer layer;
program instructions to form at least one high resistance (high-k) layer; and
program instructions to form at least one work function metal (WFM) layer.

### Claim 20 (depends on 13)

The computer system of claim 13, further comprising:
program instructions to form above the vertical channel a top source/drain (S/D), wherein the bottom layer is a bottom S/D, and wherein an electrical current flows between the top S/D and the bottom S/D through the vertical channel in the direction substantially orthogonal to the direction of the plane of fabrication.