# US 10,312,341 B2 · Integrated circuit device and method of manufacturing the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,312,341 B2 - Document ID: US10312341B2 - Status: Granted - Kind: B2 - Application number: 15/824,083 - Filed: 2017-11-28 - Published: 2018-03-29 - Granted: 2019-06-04 - Earliest claimed: 2015-09-21 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: Ha-jin Lim; Gi-gwan Park; Weon-hong Kim - Web page: https://patentgrep.com/patent/US10312341B2 ## CPC - H10D 64/667: {the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers (having lateral variation H10D64/671)} - H10D 30/0245: {by further thinning the channel after patterning the channel, e.g. using sacrificial oxidation on fins} - H10D 30/62: Fin field-effect transistors [FinFET] - H10D 30/6213: {having rounded corners} - H10D 64/512: {Disposition of the gate electrodes, e.g. buried gates} - H10D 64/68: characterised by the insulator, e.g. by the gate insulator - H10D 84/014: {the gate conductors having different materials or different implants} - H10D 84/0177: {the gate conductors having different materials or different implants} - H10D 84/038: {using silicon technology, e.g. SiGe} - H10D 84/83: of only insulated-gate FETs [IGFET] - H10D 84/83135: {the IGFETs characterised by having different gate conductor materials or different gate conductor implants} - H10D 84/834: {comprising FinFETs} - H10D 84/85: Complementary IGFETs, e.g. CMOS - H10D 84/853: {comprising FinFETs} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract An integrated circuit device includes a first gate stack formed on a first high dielectric layer and comprising a first work function adjustment metal containing structure and a second gate stack formed on a second high dielectric layer and comprising a second work function adjustment metal containing structure having an oxygen content that is greater than that of the first work function adjustment metal containing structure. ## Claims ### Claim 1 A method of manufacturing an integrated circuit device, the method comprising: forming a first dielectric layer on a substrate in a first area and a second dielectric layer on the substrate in a second area; forming a metal containing layer covering the first dielectric layer in the first area and the second dielectric layer in the second area; and oxidizing at least a part of the metal containing layer in the second area while covering the metal containing layer in the first area to prevent oxidization of the metal containing layer in the first area by a mask pattern. ### Claim 2 (depends on 1) The method of claim 1, wherein the oxidizing of the at least the part of the metal containing layer in the second area comprises: exposing the metal containing layer in the second area to an oxygen containing atmosphere while covering the metal containing layer in the first area by the mask pattern. ### Claim 3 (depends on 2) The method of claim 2, wherein the oxidizing of the at least the part of the metal containing layer in the second area further comprises: annealing the metal containing layer in the second area under the oxygen containing atmosphere. ### Claim 4 (depends on 2) The method of claim 2, further comprising: reducing an oxygen vacancy density in the second dielectric layer while oxidizing the at least the part of the metal containing layer in the second area. ### Claim 5 (depends on 2) The method of claim 2, wherein the oxygen containing atmosphere includes ozone water. ### Claim 6 (depends on 2) The method of claim 2, wherein the oxidizing of the at least the part of the metal containing layer in the second area comprises: oxidizing an upper portion of the metal containing layer exposed through the mask pattern in the second area while not oxidizing a lower portion of the metal containing layer in the second area. ### Claim 7 (depends on 1) The method of claim 1, further comprising: forming a first fin-type active area on the substrate in the first area and a second fin-type active area on the substrate in the second area, before the forming of the first and second dielectric layers; forming a first upper gate layer on the metal containing layer in the first area; and forming a second upper gate layer on a resultant of the oxidizing the at least the part of the metal containing layer in the second area, wherein the forming of the first and second dielectric layers comprises forming the first dielectric layer on the first fin-type active area and the second dielectric layer on the second fin-type active area, wherein the first dielectric layer covers a bottom and sidewalls of the first upper gate layer, the second dielectric layer covers a bottom and sidewalls of the second upper gate layer, and each of the first and second dielectric layers includes a metal oxide material. ### Claim 8 (depends on 1) The method of claim 1, further comprising: forming a third dielectric layer on the substrate in a third area while forming the first dielectric layer and the second dielectric layer; forming an other metal containing layer covering the third dielectric layer in the third area; oxidizing the other metal containing layer in the third area while oxidizing the at least the part of the metal containing layer in the second area; and forming an upper conductive layer by oxidizing an upper part of the other metal containing layer in the third area while covering the metal containing layer in the first and second areas by a mask pattern. ### Claim 9 (depends on 8) The method of claim 8, wherein the forming of the upper conductive layer comprises contacting an upper surface of the other metal containing layer with ozone water. ### Claim 10 A method of manufacturing an integrated circuit device, the method comprising: forming a first dielectric layer on a substrate in a first area and a second dielectric layer on the substrate in a second area; forming a metal containing layer covering the first dielectric layer in the first area and the second dielectric layer in the second area; forming an oxygen containing conductive layer in the second area by supplying oxygen atoms to the metal containing layer in the second area, the oxygen containing conductive layer having a higher oxygen content than an oxygen content of the metal containing layer in the first area; and forming a first upper gate layer on the metal containing layer in the first area and a second upper gate layer on the oxygen containing conductive layer in the second area, wherein the metal containing layer in the first area is covered by a mask pattern while the oxygen atoms are supplied to the metal containing layer in the second area. ### Claim 11 (depends on 10) The method of claim 10, wherein the forming of the oxygen containing conductive layer comprises: annealing the metal containing layer in the second area under an oxygen containing atmosphere while covering the metal containing layer in the first area by the mask pattern. ### Claim 12 (depends on 10) The method of claim 10, further comprising diffusing the oxygen atoms supplied to the metal containing layer into the second dielectric layer to increase an oxygen content of the second dielectric layer. ### Claim 13 (depends on 10) The method of claim 10, further comprising: forming a first fin-type active area on the substrate in the first area and a second fin-type active area on the substrate in the second area, before the forming of the first and second dielectric layers, wherein the forming of the first and second dielectric layers comprises forming the first dielectric layer on the first fin-type active area and the second dielectric layer on the second fin-type active area, wherein the first dielectric layer covers a bottom and sidewalls of the first upper gate layer, the second dielectric layer covers a bottom and sidewalls of the second upper gate layer, and each of the first and second dielectric layers includes a metal oxide material. ### Claim 14 A method of manufacturing an integrated circuit device, the method comprising: forming a first dielectric layer on a substrate in a first area and a second dielectric layer on the substrate in a second area; and forming a first metal containing structure covering the first dielectric layer in the first area and a second metal containing structure covering the second dielectric layer in the second area, wherein the forming of the first metal containing structure and the second metal containing structure comprises: forming a metal containing layer covering the first dielectric layer in the first area and the second dielectric layer in the second area; and exposing at least a part of the metal containing layer in the second area to an oxidization atmosphere while covering another part of the metal containing layer in the first area by a mask pattern, and wherein the first metal containing structure has a first oxygen content and the second metal containing structure has a second oxygen content that is greater than the first oxygen content. ### Claim 15 (depends on 14) The method of claim 14, wherein the exposing of the at least the part of the metal containing layer in the second area to the oxidization atmosphere comprises: oxidizing an upper portion of the metal containing layer in the second area while not oxidizing a lower portion of the metal containing layer in the second area. ### Claim 16 (depends on 14) The method of claim 14, wherein the exposing the at least the part of the metal containing layer in the second area to the oxidization atmosphere comprises: annealing the metal containing layer in the second area under an oxygen containing atmosphere while covering the metal containing layer in the first area by the mask pattern. ### Claim 17 (depends on 14) The method of claim 14, further comprising: forming a first fin-type active area on the substrate in the first area and a second fin-type active area on the substrate in the second area, before the forming of the first and second dielectric layers, wherein the forming of the first and second dielectric layers comprises forming the first dielectric layer on the first fin-type active area and the second dielectric layer on the second fin-type active area, wherein the first dielectric layer covers a bottom and sidewalls of the first metal containing structure, the second dielectric layer covers a bottom and sidewalls of the second metal containing structure, and each of the first and second dielectric layers includes a metal oxide material.