# US 10,312,325 B2 · Techniques for forming finFET transistors with same fin pitch and different source/drain epitaxy configurations

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- Number: US 10,312,325 B2
- Document ID: US10312325B2
- Status: Granted
- Kind: B2
- Application number: 15/854,590
- Filed: 2017-12-26
- Published: 2018-05-03
- Granted: 2019-06-04
- Earliest claimed: 2016-06-06
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Kangguo Cheng; Peng Xu
- Web page: https://patentgrep.com/patent/US10312325B2

## CPC

- H10D 62/151: {of IGFETs (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713)}
- H10D 84/013: {Manufacturing their source or drain regions, e.g. silicided source or drain regions}
- H10D 84/0147: {Manufacturing their gate sidewall spacers}
- H10D 84/0151: {Manufacturing their isolation regions}
- H10D 84/0158: {the components including FinFETs}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D 84/8311: {the IGFETs characterised by having different channel structures}
- H10D 84/8312: {the IGFETs characterised by having different source or drain region structures, e.g. IGFETs having symmetrical source or drain regions integrated with IGFETs having asymmetrical source or drain regions}
- H10D 84/834: {comprising FinFETs}
- H10D 86/011: {comprising FinFETs}
- H10D 86/215: {comprising FinFETs}
- H10D 84/0128: {Manufacturing their channels}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

In one aspect, a method of forming a finFET device includes: partially forming fins in first/second regions of a substrate; selectively forming spacers on opposite sides of only the fins in a second region; completing formation of the fins such that, based on the spacers, the fins in the second region have a wider base; depositing an insulator between the fins; recessing the insulator to expose a top portion of the fins; forming at least one gate over the fins; further recessing the insulator in the source and drain regions to expose a bottom portion of the fins; and growing an epitaxial material in the source and drain regions that is un-merged in the first region yet is merged in the second region due to the base of the fins in the second region having a wider base. A finFET device is also provided.

## Claims

### Claim 1

A method of forming a fin field-effect transistor (finFET) device, comprising:
partially forming fins in a substrate, wherein at least one of the fins is formed in a first region of the substrate, and at least another one of the fins is formed in a second region of the substrate;
selectively forming spacers on opposite sides of only the fins in the second region of the substrate;
completing formation of the fins such that the fins in the first region of the substrate have a uniform width and, based on the spacers, the fins in the second region of the substrate have a base that is wider than the fins in the first region of the substrate;
depositing an insulator between the fins;
recessing the insulator to expose top portions of the fins;
forming at least one gate over a region of the fins that serves as a channel region of the finFET device, and wherein regions of the fins extending out from under the gate serve as source and drain regions of the finFET device;
further recessing the insulator in the source and drain regions to expose bottom portions of the fins, wherein the bottom portions of the fins exposed in the source and drain regions have a different width in the first region of the substrate versus the second region of the substrate, with the base of the fins in the second region of the substrate that are wider than the fins in the first region of the substrate protruding from the insulator; and
growing an epitaxial material in the source and drain regions that is un-merged in the first region of the substrate yet is merged in the second region of the substrate due to the base of the fins in the second region of the substrate being wider than the fins in the first region of the substrate and protruding from the insulator.

### Claim 2 (depends on 1)

The method of claim 1, wherein the fins have a uniform pitch x.

### Claim 3 (depends on 1)

The method of claim 1, wherein the fins in the first region of the substrate have a straight sidewall profile.

### Claim 4 (depends on 1)

The method of claim 1, wherein the fins in the second region of the substrate have a stepped profile.

### Claim 5 (depends on 1)

The method of claim 1, wherein the top portions of the fins in the second region of the substrate each have a width w, and the bottom portions of the fins in the second region of the substrate each have a width w′, wherein w′>w.

### Claim 6 (depends on 5)

The method of claim 5, wherein the top portions and the bottom portions of the fins in the first region of the substrate each have the width w.

### Claim 7 (depends on 1)

The method of claim 1, further comprising:
forming the spacers on opposite sides of the fins;
forming a mask covering the spacers and fins in only the second region of the substrate;
removing the spacers from the fins in the first region of the substrate; and
removing the mask.

### Claim 8 (depends on 1)

The method of claim 1, wherein the spacers comprise oxide spacers.

### Claim 9 (depends on 1)

The method of claim 1, wherein the spacers comprise nitride spacers.

### Claim 10 (depends on 1)

The method of claim 1, further comprising:
forming gate spacers on opposite sides of the gate.

### Claim 11 (depends on 10)

The method of claim 10, further comprising:
depositing a gate spacer material onto the substrate and alongside the gate; and
removing the gate spacer material from the fins in the source and drain regions.

### Claim 12 (depends on 11)

The method of claim 11, wherein the gate spacer material comprises a nitride material.

### Claim 13 (depends on 12)

The method of claim 12, wherein the nitride material comprises silicon nitride (SiN).

### Claim 14 (depends on 11)

The method of claim 11, wherein the insulator is further recessed during removal of the gate spacer material from the fins.

### Claim 15 (depends on 1)

The method of claim 1, wherein the insulator comprises an oxide material.

### Claim 16 (depends on 15)

The method of claim 15, wherein the insulator comprises a shallow trench isolation (STI) oxide.

### Claim 17 (depends on 16)

The method of claim 16, wherein the STI oxide comprises silicon dioxide (SiO2).

### Claim 18 (depends on 1)

The method of claim 1, wherein the substrate comprises a bulk substrate.

### Claim 19 (depends on 18)

The method of claim 18, wherein the bulk substrate is selected from the group consisting of: a bulk silicon (Si) substrate, a bulk germanium (Ge) substrate, and a bulk silicon-germanium (SiGe) substrate.

### Claim 20 (depends on 1)

The method of claim 1, wherein the gate comprises a gate line that covers both the fins in the first region of the substrate and the fins in the second region of the substrate.