# US 10,312,320 B2 · Semiconductor device

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- Number: US 10,312,320 B2
- Document ID: US10312320B2
- Status: Granted
- Kind: B2
- Application number: 15/878,038
- Filed: 2018-01-23
- Published: 2018-06-21
- Granted: 2019-06-04
- Earliest claimed: 2012-08-20
- Assignees: Rohm Co., Ltd.
- Applicants: Rohm Co., Ltd.
- Inventors: Yuki Nakano; Ryota Nakamura; Hiroyuki Sakairi
- Web page: https://patentgrep.com/patent/US10312320B2

## CPC

- H10D 62/109: {Reduced surface field [RESURF] PN junction structures}
- H10D 12/031: {of IGBTs}
- H10D 30/668: {having trench gate electrodes, e.g. UMOS transistors}
- H10D 62/115: {Dielectric isolations, e.g. air gaps}
- H10D 62/116: {adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions}
- H10D 62/127: {of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs}
- H10D 62/151: {of IGFETs (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713)}
- H10D 62/393: {Body regions of DMOS transistors or IGBTs (cell layout of DMOS H10D62/127)}
- H10D 62/8325: {Silicon carbide}
- H10D 64/2527: {for vertical devices wherein the source or drain electrodes are recessed in semiconductor bodies}
- H10D 64/256: {for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies (source or drain electrodes of TFTs H10D30/673)}
- H10D 64/62: Electrodes ohmically coupled to a semiconductor
- H10D 64/64: Electrodes comprising a Schottky barrier to a semiconductor
- H10D 64/661: {the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation (having lateral variation in the gate structure H10D64/671)}
- H10D 84/144: {in antiparallel diode configurations}
- H10D 84/146: {the built-in components being Schottky barrier diodes}
- H10D 30/0295: {using recessing of the source electrodes}
- H10D 30/0297: {using recessing of the gate electrodes, e.g. to form trench gate electrodes}
- H10P 30/2042: {into crystalline silicon carbide}
- H10P 30/21: {of electrically active species}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

The semiconductor device includes: a semiconductor layer in which a trench is formed having a side surface and a bottom surface; a second conductivity-type layer formed on the semiconductor layer on the side surface and the bottom surface of the trench; a first conductivity-type layer formed on the semiconductor layer so as to contact the second conductivity-type layer; a first electrode electrically connected to the first conductivity-type layer; a second electrode embedded in the trench and electrically connected to the second conductivity-type layer; and a barrier-forming layer which is arranged between the second electrode and the side surface of the trench and which, between said barrier-forming layer and the second conductivity-type layer, forms a potential barrier higher than the potential barrier between the second conductivity-type layer and the second electrode.

## Claims

### Claim 1

A semiconductor device comprising:
a semiconductor layer in which a gate trench having a side surface and a bottom surface and a source trench having a side surface and a bottom surface are formed;
a first conductivity type source layer that is disposed so as to be exposed on a surface of the semiconductor layer and that defines the side surface of the gate trench and the side surface of the source trench;
a second conductivity type channel layer that is disposed so as to be contiguous to the source layer on a back surface side of the semiconductor layer with respect to the source layer and that defines a part of the side surface of the gate trench and a part of the side surface of the source trench;
a first conductivity type drain layer that is disposed so as to be contiguous to the channel layer on the back surface side of the semiconductor layer with respect to the channel layer and that defines the bottom surface of the gate trench and the bottom surface of the source trench;
a gate electrode that is embedded in the gate trench;
a gate insulating film disposed between the side and bottom surfaces of the gate trench and the gate electrode;
a source electrode that is embedded in the source trench and that is electrically connected to the source layer; and
a hetero junction diode formed at a joint surface between the source electrode and the drain layer.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1, wherein the source trench has a depth deeper than that of the gate trench.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1, wherein the gate electrode is made of polysilicon.

### Claim 4 (depends on 1)

The semiconductor device according to claim 1, further comprising a second conductivity type source breakdown voltage holding layer that is formed so as to be continuous with the channel layer and that is disposed on the side surface and the bottom surface of the source trench.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1, further comprising an insulating layer disposed on the side surface of the source trench and an edge portion of the bottom surface of the source trench.

### Claim 6 (depends on 1)

The semiconductor device according to claim 1, further comprising a drain electrode electrically connected to the drain layer.

### Claim 7 (depends on 5)

The semiconductor device according to claim 5, wherein the source electrode has a polysilicon layer at least on the insulating layer.

### Claim 8 (depends on 4)

The semiconductor device according to claim 4, wherein the source electrode is electrically connected to the source breakdown voltage holding layer.

### Claim 9 (depends on 1)

The semiconductor device according to claim 1, wherein the hetero junction diode has a junction barrier smaller than a diffusion potential of a body diode formed by pn junction between the channel layer and the drain layer.

### Claim 10 (depends on 9)

The semiconductor device according to claim 9, wherein the junction barrier of the hetero junction diode is 1 eV to 1.5 eV, and
the diffusion potential of the body diode is 2.8 eV to 3.2 eV.

### Claim 11 (depends on 5)

The semiconductor device according to claim 5, wherein the insulating layer is disposed such that the source layer is exposed from the side surface of the source trench.

### Claim 12 (depends on 7)

The semiconductor device according to claim 7, wherein the polysilicon layer is embedded in a region inside the insulating layer in the source trench, and
the source electrode includes a metal layer stacked on the polysilicon layer embedded in the region.

### Claim 13 (depends on 1)

The semiconductor device according to claim 1, wherein the semiconductor layer is made of SiC.

### Claim 14 (depends on 5)

The semiconductor device according to claim 5, wherein the insulating layer is made of any one of non-doped polysilicon, silicon oxide (SiO2), aluminum oxide (Al2O3), and aluminum oxynitride (AlON).

### Claim 15 (depends on 5)

The semiconductor device according to claim 5, wherein the side surface of the source trench is covered with the insulating layer in a region ranging from the bottom surface of the source trench to an opening end of the source trench in a depth direction.

### Claim 16 (depends on 5)

The semiconductor device according to claim 5, wherein the insulating layer selectively covers a part below the channel layer of the side surface of the source trench such that the source layer and the channel layer are exposed to the side surface of the source trench.