# US 10,312,317 B2 · Chip resistor and chip resistor assembly > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,312,317 B2 - Document ID: US10312317B2 - Status: Granted - Kind: B2 - Application number: 15/896,320 - Filed: 2018-02-14 - Published: 2018-11-01 - Granted: 2019-06-04 - Earliest claimed: 2017-04-27 - Assignees: Samsung Electro-Mechanics Co., Ltd. - Applicants: Samsung Electro-Mechanics Co., Ltd. - Inventors: Doo Ho Yoo; Jung Il Kim; Young Key Kim; Jung Min Nam - Web page: https://patentgrep.com/patent/US10312317B2 ## CPC - H10D 1/47: Resistors having no potential barriers - H01C 1/01: Mounting; Supporting - H01C 1/142: the terminals or tapping points being coated on the resistive element - H01C 7/00: Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material (consisting of loose powdered or granular material H01C8/00; resistors having potential barriers, e.g. field-effect resistors, H10D1/40 - H10D1/43, H10K10/10; semiconductor devices sensitive to electromagnetic or corpuscular radiation, e.g. photoresistors, H10F30/00; magnetic field controlled resistors H10N50/10; bulk negative resistance effect devices H10N80/00) - H01C 7/003: {Thick film resistors} - H05K 1/167: {incorporating printed resistors} - H10W 74/129: {forming a chip-scale package [CSP]} - H10W 76/60: Seals - H01C 17/006: {adapted for manufacturing resistor chips} - H05K 3/3431: {Leadless components} - H05K 2201/10022: Non-printed resistor - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H01C: RESISTORS - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A chip resistor includes a base substrate having a first surface and a second surface opposing each other, two side surfaces connecting the first surface and the second surface, and two end surfaces connecting the first surface and the second surface, a resistive layer disposed on the second surface of the base substrate, the resistive layer having a first surface in contact with the base substrate and a second surface opposing the first surface of the resistive layer, a first terminal and a second terminal spaced apart from each other and each being connected to the resistive layer on the second surface of the resistive layer, and a third terminal connected to the resistive layer on the second surface of the resistive layer, disposed between the first terminal and the second terminal, and extending to the first surface of the base substrate along the side surfaces. ## Claims ### Claim 1 A chip resistor, comprising: a base substrate having a first surface and a second surface opposing each other, two side surfaces connecting the first surface and the second surface, and two end surfaces connecting the first surface and the second surface; a resistive layer disposed on the second surface of the base substrate, the resistive layer having a first surface in contact with the base substrate and a second surface opposing the first surface of the resistive layer; a first terminal and a second terminal spaced apart from each other and each being connected to the resistive layer on the second surface of the resistive layer; a third terminal connected to the resistive layer on the second surface of the resistive layer, disposed between the first terminal and the second terminal, and extending to the first surface of the base substrate along the side surfaces; and a protective layer disposed on the first surface of the base substrate, wherein the protective layer is disposed in two regions of the first surface of the base substrate, divided by the third terminal. ### Claim 2 (depends on 1) The chip resistor of claim 1, wherein the first terminal and the second terminal cover one end and the other end of the resistive layer, respectively, and are in contact with the second surface of the base substrate. ### Claim 3 (depends on 1) The chip resistor of claim 1, wherein the first terminal and the second terminal extend to the end surfaces and cover edges at which the second surface of the base substrate and the end surfaces meet, respectively. ### Claim 4 (depends on 1) The chip resistor of claim 1, wherein the third terminal includes a first surface portion disposed on the first surface of the base substrate, and the first surface portion is divided into two portions extended from the two side surfaces. ### Claim 5 (depends on 4) The chip resistor of claim 4, wherein the protective layer is disposed between the two portions of the first surface portion. ### Claim 6 (depends on 1) The chip resistor of claim 1, comprising a protective layer disposed on the second surface of the resistive layer. ### Claim 7 (depends on 1) The chip resistor of claim 1, wherein the protective layer covers a portion of the third terminal. ### Claim 8 (depends on 1) The chip resistor of claim 1, wherein the first terminal, the second terminal, and the third terminal include a first electrode layer, a second electrode layer, and a third electrode layer, respectively, as well as a first plating layer, a second plating layer, and a third plating layer, disposed on the first electrode layer, the second electrode layer, and the third electrode layer, respectively. ### Claim 9 (depends on 8) The chip resistor of claim 8, wherein a portion of the third electrode layer disposed on the side surfaces of the base substrate is formed using a deposition process. ### Claim 10 (depends on 1) The chip resistor of claim 1, wherein the first terminal and the second terminal are formed using a plating process after printing. ### Claim 11 A chip resistor assembly, comprising: a circuit board having a plurality of electrode pads; a chip resistor disposed on the circuit board and electrically connected to the plurality of electrode pads, wherein the chip resistor includes a base substrate having a first surface and a second surface opposing each other, two side surfaces connecting the first surface and the second surface, and two end surfaces connecting the first surface and the second surface, a resistive layer disposed on the second surface of the base substrate, the resistive layer having a first surface in contact with the base substrate and a second surface opposing the first surface of the resistive layer, a first terminal and a second terminal spaced apart from each other and each being connected to the resistive layer on the second surface of the resistive layer, a third terminal connected to the resistive layer on the second surface of the resistive layer, disposed between the first terminal and the second terminal, and extending to the first surface of the base substrate along the side surfaces, and a protective layer disposed on the first surface of the base substrate, wherein the third terminal includes a first surface portion disposed on the first surface of the base substrate, and the first surface portion is divided into two portions extending from the two side surfaces, and wherein the protective layer is disposed between the two portions of the first surface portion. ### Claim 12 (depends on 11) The chip resistor assembly of claim 11, wherein the first terminal and the second terminal extend to the end surfaces and cover edges at which the second surface of the base substrate and the end surfaces meet, respectively. ### Claim 13 (depends on 11) The chip resistor of claim 11, comprising a protective layer disposed on the second surface of the resistive layer. ### Claim 14 (depends on 11) The chip resistor assembly of claim 11, wherein the protective layer covers a portion of the third terminal. ### Claim 15 (depends on 11) The chip resistor assembly of claim 11, wherein the protective layer is disposed on two regions of the first surface of the base substrate, divided by the third terminal.