# US 10,312,314 B2 · Display device, method of manufacturing the same, and electronic apparatus

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- Number: US 10,312,314 B2
- Document ID: US10312314B2
- Status: Granted
- Kind: B2
- Application number: 16/181,838
- Filed: 2018-11-06
- Published: 2019-03-07
- Granted: 2019-06-04
- Earliest claimed: 2013-09-12
- Assignees: Sony Corporation
- Applicants: Sony Corporation
- Inventors: Seiichiro Jinta
- Web page: https://patentgrep.com/patent/US10312314B2

## CPC

- H10K 59/1213: {the pixel elements being TFTs}
- G09G 3/2003: {Display of colours (specific for liquid crystal displays G09G3/3607)}
- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- H10D 30/6731: {Top-gate only TFTs}
- H10D 30/6732: {Bottom-gate only TFTs}
- H10D 30/6734: {having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs}
- H10D 30/6745: {Polycrystalline or microcrystalline silicon}
- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 64/665: {the conductor comprising a layer of elemental metal contacting the insulator, e.g. tungsten or molybdenum (having lateral variation H10D64/671)}
- H10D 86/021: {of multiple TFTs}
- H10D 86/0221: {comprising manufacture, treatment or patterning of TFT semiconductor bodies}
- H10D 86/0227: {using structural arrangements to control crystal growth, e.g. placement of grain filters}
- H10D 86/421: {having a particular composition, shape or crystalline structure of the active layer}
- H10D 86/425: {having different crystal properties in different TFTs or within an individual TFT}
- H10D 86/431: {having different compositions, shapes, layouts or thicknesses of gate insulators in different TFTs}
- H10D 86/471: {having different architectures, e.g. having both top-gate and bottom-gate TFTs}
- H10D 86/60: wherein the TFTs are in active matrices
- H10K 50/13: comprising stacked EL layers within one EL unit
- H10K 59/131: Interconnections, e.g. wiring lines or terminals
- H10K 59/351: {comprising more than three subpixels, e.g. red-green-blue-white [RGBW]}
- G09G 2230/00: Details of flat display driving waveforms
- G09G 2300/0426: Layout of electrodes and connections
- G09G 2300/0452: Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
- G09G 2300/0809: Several active elements per pixel in active matrix panels
- G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G 2310/08: Details of timing specific for flat panels, other than clock recovery
- G09G 2320/02: Improving the quality of display appearance
- H10K 59/1201: {Manufacture or treatment}
- H10K 59/353: {characterised by the geometrical arrangement of the RGB subpixels}
- H10K 59/38: comprising colour filters or colour changing media [CCM]
- H10K 2102/3026: {Top emission}
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

There is provided a display device including: a light emitting element; and a drive transistor (DRTr) that includes a coupling section (W1) and a plurality of channel sections (CH) coupled in series through the coupling section (W1), wherein the drive transistor (DRTr) is configured to supply a drive current to the light emitting element.

## Claims

### Claim 1

A display device comprising:
a plurality of pixels, at least one of the plurality of pixels including: a light emitting element;
a first transistor configured to supply a drive current to the light emitting element,
a first insulating layer, and a second insulating layer, wherein the first transistor includes:
a first channel portion, a first gate electrode, and an electrically-conductive layer, wherein, in a region where the first transistor is disposed, the electrically-conductive layer, the first insulating layer, the first channel portion, the second insulating layer and the first gate electrode are stacked on a substrate in this order,
the first channel portion is a part of a first poly-silicon layer having a bent portion,
the first gate electrode and the electrically-conductive layer arranged so as not to overlap the bent portion, and
a channel length of the first channel portion is larger than a channel width of the first channel portion.

### Claim 2 (depends on 1)

The display device according to claim 1, wherein said at least one of the pixels further includes a write transistor configured to transfer a pixel voltage corresponding to a luminance intensity of the light emitting element,
wherein the write transistor includes:
a second channel portion, and
a second gate electrode,
wherein, in a region where the second transistor is disposed, the first insulating layer, the second channel portion, the second insulating layer and the second gate electrode are stacked on the substrate in this order.