# US 10,312,268 B2 · Display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,312,268 B2 - Document ID: US10312268B2 - Status: Granted - Kind: B2 - Application number: 15/876,383 - Filed: 2018-01-22 - Published: 2018-05-24 - Granted: 2019-06-04 - Earliest claimed: 2015-12-03 - Assignees: Innolux Corporation - Applicants: InnoLux Corporation - Inventors: Tzu-Min Yan; Ming-Chang Lin; Kuan-Feng Lee - Web page: https://patentgrep.com/patent/US10312268B2 ## CPC - H10D 86/60: wherein the TFTs are in active matrices - G02F 1/133345: {Insulating layers (G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence)} - H10D 30/6723: {having light shields} - H10D 30/6734: {having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs} - H10D 30/674: {characterised by the active materials} - H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)} - H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO} - H10D 86/451: {characterised by the compositions or shapes of the interlayer dielectrics} - H10D 86/471: {having different architectures, e.g. having both top-gate and bottom-gate TFTs} - G02F 2201/40: Arrangements for improving the aperture ratio - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS ## Abstract A display device is provided, which includes a substrate including a pixel region; a metal oxide semiconductor transistor disposed over the substrate and including: a metal oxide semiconductor layer, a first gate electrode overlapping with the metal oxide semiconductor layer; and a gate insulating layer disposed between the metal oxide semiconductor layer and the first gate electrode, and the gate insulating layer having a first opening, wherein the first opening and the pixel region overlap; a second insulating layer disposed over the metal oxide semiconductor layer and having a via and a second opening, wherein the second opening and the pixel region overlap; and a pixel electrode electrically connected to the metal oxide semiconductor layer through the via. ## Claims ### Claim 1 A display device, comprising: a substrate comprising a pixel region and a driving circuit, wherein the pixel region is disposed adjacent to the driving circuit; a metal oxide semiconductor transistor disposed over the substrate and comprising: a metal oxide semiconductor layer, a first gate electrode overlapping with the metal oxide semiconductor layer; and a gate insulating layer disposed between the metal oxide semiconductor layer and the first gate electrode, and the gate insulating layer having a first opening, wherein the first opening and the pixel region overlap; a second insulating layer disposed over the metal oxide semiconductor layer and having a via and a second opening, wherein the second opening and the first opening overlap; and a pixel electrode electrically connected to the metal oxide semiconductor layer through the via. ### Claim 2 (depends on 1) The display device as claimed in claim 1, wherein the first opening further extends beyond the pixel region. ### Claim 3 (depends on 2) The display device as claimed in claim 2, wherein the first opening is adjacent to the driving circuit. ### Claim 4 (depends on 1) The display device as claimed in claim 1, further comprises a third insulating layer over the second insulating layer and in the second opening. ### Claim 5 (depends on 4) The display device as claimed in claim 4, wherein the third insulating layer is in contact with a sidewall of the second opening. ### Claim 6 (depends on 4) The display device as claimed in claim 4, wherein the third insulating layer is in contact with the substrate. ### Claim 7 (depends on 1) The display device as claimed in claim 1, further comprising a thin film transistor adjacent to the first opening. ### Claim 8 (depends on 7) The display device as claimed in claim 7, wherein the thin film transistor is a polysilicon transistor. ### Claim 9 (depends on 8) The display device as claimed in claim 8, further comprising a second gate electrode overlapping with a polysilicon layer of the polysilicon transistor. ### Claim 10 (depends on 9) The display device as claimed in claim 9, wherein the second gate electrode is disposed over the polysilicon layer. ### Claim 11 (depends on 9) The display device as claimed in claim 9, wherein the polysilicon layer is disposed over the second gate electrode. ### Claim 12 (depends on 1) The display device as claimed in claim 1, wherein the first gate electrode is disposed over the metal oxide semiconductor layer. ### Claim 13 (depends on 1) The display device as claimed in claim 1, wherein the metal oxide semiconductor layer is disposed over the first gate electrode. ### Claim 14 (depends on 1) The display device as claimed in claim 1, further comprising a source electrode and a drain electrode electrically connected to the metal oxide semiconductor layer. ### Claim 15 (depends on 1) The display device as claimed in claim 1, further comprising a shielding layer, wherein the metal oxide semiconductor layer overlaps the shielding layer. ### Claim 16 (depends on 1) The display device as claimed in claim 1, further comprising a display medium on the substrate. ### Claim 17 (depends on 16) The display device as claimed in claim 16, wherein the display medium comprises organic light-emitting diode, micro light-emitting diode, or quantum dot. ### Claim 18 (depends on 1) The display device as claimed in claim 1, being a flexible device.