# US 10,312,265 B2 · Array substrate and manufacturing method of array substrate for reducing electric field interference

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- Number: US 10,312,265 B2
- Document ID: US10312265B2
- Status: Granted
- Kind: B2
- Application number: 15/739,732
- Filed: 2017-09-21
- Published: 2019-02-21
- Granted: 2019-06-04
- Earliest claimed: 2017-09-21
- Assignees: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
- Applicants: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
- Inventors: Yang Zhao; Jianhong Chen
- Web page: https://patentgrep.com/patent/US10312265B2

## CPC

- H10D 86/60: wherein the TFTs are in active matrices
- G02F 1/133514: {Colour filters}
- G02F 1/136204: {Arrangements to prevent high voltage or static electricity failures}
- G02F 1/136227: {Through-hole connection of the pixel electrode to the active element through an insulation layer}
- G02F 1/136286: {Wiring, e.g. gate line, drain line}
- G02F 1/1368: in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)}
- H10D 30/6729: {characterised by the electrodes}
- H10D 86/021: {of multiple TFTs}
- H10D 86/0212: {comprising manufacture, treatment or coating of substrates}
- H10D 86/441: {Interconnections, e.g. scanning lines}
- G02F 1/136218: {Shield electrodes}
- G02F 1/136295: {Materials; Compositions; Manufacture processes}
- G02F 2201/121: common or background
- G02F 2201/123: pixel
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS

## Abstract

The present invention provides an array substrate and a manufacturing method thereof. The array substrate includes: a base substrate; a TFT on the base substrate, a data line electrically connected with a source of the TFT, a transparent conductive layer between the data line and the pixel electrode, a pixel electrode electrically connected with a drain of the TFT, wherein the data line and the pixel electrode are set on different layers, and the data line, the transparent conductive layer, and the pixel electrode are laminated and insulating to each other. It reduces electric field interference generated by the data line to the pixel electrode by the array substrate of the present invention.

## Claims

### Claim 1

An array substrate, comprising:
a base substrate;
a thin-film transistor (TFT) on the base substrate, comprising a source and a drain;
a data line electrically connected with the source;
a pixel electrode electrically connected with the drain;
a transparent conductive layer between the data line and the pixel electrode, wherein the pixel electrode is electrically connected with the drain; and
a color filter layer and a flat protective layer between the transparent conductive layer and the pixel electrode, wherein color filter layer is located on a side of the transparent conductive layer far away from the data line, and the flat protective layer is located on a side of the color filter layer far away from the transparent conductive layer;
wherein the data line and the pixel electrode are set on different layers, a vertical projection of the data line overlaps that of the pixel electrode at the same flat, and the data line, the transparent conductive layer, and the pixel electrode are laminated and insulating to each other.

### Claim 2 (depends on 1)

The array substrate of claim 1, wherein a material of the transparent conductive layer is ITO.

### Claim 3 (depends on 1)

The array substrate of claim 1, wherein a material of the flat protective layer is polyfluoroalkoxy (PFA).

### Claim 4

An array substrate, comprising:
a base substrate;
a thin-film transistor (TFT) on the base substrate, comprising a source and a drain;
a data line electrically connected with the source;
a pixel electrode electrically connected with the drain;
a transparent conductive layer between the data line and the pixel electrode; and
a color filter layer and a flat protective layer between the transparent conductive layer and the pixel electrode, wherein the color filter layer is located on a side of the transparent conductive layer far away from the data line, and the flat protective layer is located on a side of the color filter layer far away from the transparent conductive layer;
wherein the data line and the pixel electrode are set on different layers, and the data line, the transparent conductive layer, and the pixel electrode are laminated and insulating to each other.

### Claim 5 (depends on 4)

The array substrate of claim 4, wherein a vertical projection of the data line overlaps that of the pixel electrode at the same flat.

### Claim 6 (depends on 4)

The array substrate of claim 4, wherein the pixel electrode is electrically connected with the drain.

### Claim 7 (depends on 4)

The array substrate of claim 4, wherein a material of the transparent conductive layer is ITO.

### Claim 8 (depends on 4)

The array substrate of claim 4, wherein a material of the flat protective layer is polyfluoroalkoxy (PFA).

### Claim 9

A method of manufacturing an array substrate, comprising steps of:
providing a base substrate;
forming a TFT on the base substrate, comprising a source and a drain;
forming a data line electrically connected with the source;
forming a transparent conductive layer between the data line and the pixel electrode; and
forming a pixel electrode electrically connected with the drain,
wherein the data line and the pixel electrode are set on different layers, and the data line, the transparent conductive layer, and the pixel electrode are laminated and insulating to each other;
after forming the transparent conductive layer and before forming the pixel electrode, further comprising forming a color filter layer and a flat protective layer covering the color filter layer in order, wherein the color filter layer is located on a side of the transparent conductive layer far away from the data line, and the flat protective layer is located on a side of the color filter layer far away from the transparent conductive layer.

### Claim 10 (depends on 9)

The method of claim 9, wherein a material of the transparent conductive layer is ITO.