# US 10,312,211 B2 · Method of manufacturing semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,312,211 B2 - Document ID: US10312211B2 - Status: Granted - Kind: B2 - Application number: 15/341,379 - Filed: 2016-11-02 - Published: 2017-05-18 - Granted: 2019-06-04 - Earliest claimed: 2015-11-16 - Assignees: Toyota Jidosha Kabushiki Kaisha - Applicants: Toyota Jidosha Kabushiki Kaisha - Inventors: Takuya Kadoguchi; Naoya Take - Web page: https://patentgrep.com/patent/US10312211B2 ## CPC - B23K 35/00: Rods, electrodes, materials, or media, for use in soldering, welding, or cutting - B23K 1/0016: {Soldering of electronic components} - B23K 1/19: taking account of the properties of the materials to be soldered - B23K 1/20: Preliminary treatment of work or areas to be soldered, e.g. in respect of a galvanic coating - B23K 35/0238: {layered} - B23K 35/262: {Sn as the principal constituent} - C22C 13/00: Alloys based on tin - H10W 40/778: {in encapsulations} - H10W 70/417: {Bonding materials between chips and die pads} - H10W 70/442: {of multiple leadframes in a single chip} - H10W 70/457: {of metallic layers on leadframes} - H10W 70/481: {for devices being provided for in groups H10D8/00 - H10D48/00} - H10W 90/00: Package configurations - H10W 90/811: {Multiple chips on leadframes} - B23K 2101/34: Coated articles {; Surface treated articles} - B23K 2101/40: Semiconductor devices - B23K 2103/56: {being semiconducting} - H10W 70/427: {Bent parts} - H10W 72/01325: {in solid form} - H10W 72/01336: {in solid form, e.g. by using a powder or by laminating a foil} - H10W 72/01357: {by reflowing or heating} - H10W 72/07336: {Soldering or alloying} - H10W 72/07354: {changes in dispositions} - H10W 72/07355: {changes in materials} - H10W 72/325: {Die-attach connectors having a filler embedded in a matrix} - H10W 72/347: {Dispositions of multiple die-attach connectors} - H10W 72/352: {comprising metals or metalloids, e.g. solders} - H10W 72/3528: {Intermetallic compounds} - H10W 72/353: {not comprising solid metals or solid metalloids, e.g. ceramics} - H10W 72/381: {Auxiliary members} - H10W 72/59: Bond pads specially adapted therefor - H10W 72/923: {Bond pads having multiple stacked layers} - H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu} - H10W 90/732: {between stacked chips} - H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 95/00: Packaging processes not covered by the other groups of this subclass - B23K: SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM - C22C: ALLOYS (treatment of alloys C21D, C22F) - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A method of manufacturing a semiconductor device which includes a first member and a second member joined to the first member includes: a) producing (Cu,Ni)6Sn5 on a Ni film formed on the first member by melting a first Sn—Cu solder containing 0.9 wt % or higher of Cu on the Ni film of the first member; b) producing (Cu,Ni)6Sn5 on a Ni film formed on the second member by melting a second Sn—Cu solder containing 0.9 wt % or higher of Cu on the Ni film of the second member; and c) joining the first member and the second member to each other by melting the first Sn—Cu solder having undergone step a) and the second Sn—Cu solder having undergone step b) so that the first Sn—Cu solder and the second Sn—Cu solder become integrated. ## Claims ### Claim 1 A method of manufacturing a semiconductor device which includes a first member and a second member joined to the first member, the method comprising: a) producing (Cu,Ni)6Sn5 on a Ni film formed on the first member by melting a first Sn—Cu solder containing 0.9 wt % or higher of Cu on the Ni film of the first member; b) producing (Cu,Ni)6Sn5 on a Ni film formed on the second member by melting a second Sn—Cu solder containing 0.9 wt % or higher of Cu on the Ni film of the second member, the second Sn—Cu solder being physically separated from the first Sn—Cu solder; and c) after the steps a) and b) have been completed so that (i) the (Cu,Ni)6Sn5 has been produced from the first Sn—Cu solder on the Ni film of the first member and (ii) the (Cu,Ni)6Sn5 has been produced from the second Sn—Cu solder on the Ni film of the second member, and the second Sn—Cu solder still is physically separated from the first Sn—Cu solder, joining the first member and the second member to each other by melting the first Sn—Cu solder having undergone step a) and by melting the second Sn—Cu solder having undergone step b) so that the first Sn—Cu solder and the second Sn—Cu solder become integrated. ### Claim 2 (depends on 1) The method according to claim 1, wherein a period of time in which the first Sn—Cu solder and the second Sn—Cu solder are melted in step c) is shorter than a period of time in which the first Sn—Cu solder is melted in step a) and is shorter than a period of time in which the second Sn—Cu solder is melted in step b). ### Claim 3 (depends on 1) The method according to claim 1, wherein at least one of the first Sn—Cu solder or the second Sn—Cu solder contains 1.6 wt % or higher of Cu. ### Claim 4 (depends on 1) The method according to claim 1, wherein at least one of the first member or the second member is a power semiconductor element. ### Claim 5 (depends on 1) The method according to claim 1, wherein step a) and step b) are performed simultaneously. ### Claim 6 (depends on 1) The method according to claim 1, wherein step a) and step b) are performed at different times. ### Claim 7 (depends on 1) The method according to claim 1, wherein the first Sn—Cu solder and the second Sn—Cu solder contain no more than 3.2 wt % of the Cu. ### Claim 8 A method of manufacturing a semiconductor device which includes a first member and a second member joined to the first member, the method comprising: a) producing (Cu,Ni)6Sn5 on a Ni film formed on the first member by melting a first unit of Sn—Cu solder containing 0.9 wt % or higher of Cu on the Ni film of the first member; b) producing (Cu,Ni)6Sn5 on a Ni film formed on the second member by melting a second unit of Sn—Cu solder containing 0.9 wt % or higher of Cu on the Ni film of the second member, the second unit of Sn—Cu solder being physically separated from the first unit of Sn—Cu solder; and c) after the steps a) and b) have been completed so that (i) the (Cu,Ni)6Sn5 has been produced from the first unit of Sn—Cu solder on the Ni film of the first member and (ii) the (Cu,Ni)6Sn5 has been produced from the second unit of Sn—Cu solder on the Ni film of the second member, and the second unit of Sn—Cu solder still is physically separated from the first unit of Sn—Cu solder, joining the first member and the second member to each other by melting the first unit of Sn—Cu solder having undergone step a) and by melting the second unit of Sn—Cu solder having undergone step b) so that the first unit of Sn—Cu solder and the second unit of Sn—Cu solder become integrated into a single unit. ### Claim 9 (depends on 8) The method according to claim 8, wherein a period of time in which the first unit of Sn—Cu solder and the second unit of Sn—Cu solder are melted in step c) is shorter than a period of time in which the first unit of Sn—Cu solder is melted in step a) and is shorter than a period of time in which the second unit of Sn—Cu solder is melted in step b). ### Claim 10 (depends on 8) The method according to claim 8, wherein at least one of the first unit of Sn—Cu solder or the second unit of Sn—Cu solder contains 1.6 wt % or higher of Cu. ### Claim 11 (depends on 8) The method according to claim 8, wherein at least one of the first member or the second member is a power semiconductor element. ### Claim 12 (depends on 8) The method according to claim 8, wherein step a) and step b) are performed simultaneously. ### Claim 13 (depends on 8) The method according to claim 8, wherein step a) and step b) are performed at different times. ### Claim 14 (depends on 8) The method according to claim 8, wherein the first unit of Sn—Cu solder and the second unit of Sn—Cu solder contain no more than 3.2 wt % of the Cu.