# US 10,312,206 B2 · Array substrate > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,312,206 B2 - Document ID: US10312206B2 - Status: Granted - Kind: B2 - Application number: 15/839,870 - Filed: 2017-12-13 - Published: 2019-03-14 - Granted: 2019-06-04 - Earliest claimed: 2017-09-11 - Assignees: Au Optronics Corporation - Applicants: Au Optronics Corporation - Inventors: Jia-Hong Ye; Pin-Fan Wang - Web page: https://patentgrep.com/patent/US10312206B2 ## CPC - H10K 59/124: Insulating layers formed between TFT elements and OLED elements - H10K 59/131: Interconnections, e.g. wiring lines or terminals - H10D 86/0212: {comprising manufacture, treatment or coating of substrates} - H10D 86/411: {characterised by materials, geometry or structure of the substrates} - H10D 86/441: {Interconnections, e.g. scanning lines} - H10D 86/451: {characterised by the compositions or shapes of the interlayer dielectrics} - H10D 86/60: wherein the TFTs are in active matrices - H10K 59/1201: {Manufacture or treatment} - H10W 72/01908: {using permanent auxiliary members, e.g. using alignment marks} - H10W 72/01951: {Changing the shapes of bond pads} - H10W 72/01953: {by etching} - H10W 72/923: {Bond pads having multiple stacked layers} - H10W 72/9415: {relative to the surface, e.g. recessed, protruding} - H10W 72/981: {Auxiliary members, e.g. spacers} - H10W 72/983: {Reinforcing structures, e.g. collars} - H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract An array substrate includes a device array, a bonding pad, and at least one support structure. The bonding pad is located in a bonding area and is electrically connected to the device array. A horizontal distance between the at least one support structure and the bonding pad is between 5 μm and 1000 μm. ## Claims ### Claim 1 An array substrate, comprising: a device array; a bonding pad located in a bonding area and electrically connected to the device array; at least one support structure, wherein a first horizontal distance between the at least one support structure and the bonding pad is between 5 μm and 1000 μm; a first substrate; a first insulation layer located on the first substrate; and a second insulation layer located on the first insulation layer, wherein at least a portion of the at least one support structure is embedded in the second insulation layer, a first vertical distance formed between the at least one support structure and an upper surface of the first insulation layer is greater than 0 μm, the at least one support structure comprises a first portion and a second portion made of different materials, a material of the first portion of the at least one support structure comprises metal oxide, the second portion of the at least one support structure is located in the first portion, the second portion is not in contact with the first insulation layer, and the second portion comprises an air void. ### Claim 2 (depends on 1) The array substrate as claimed in claim 1, further comprising: a third insulation layer located on the second insulation layer, the at least one support structure being further embedded in the third insulation layer, and the bonding pad comprising: a first conductive layer extending from the bonding area towards the device array, wherein a second vertical distance is formed between a portion of the first conductive layer not being located in the bonding area and the upper surface of the first insulation layer, and the second vertical distance is between 0 μm and 1 μm. ### Claim 3 An array substrate, comprising: a device array; a bonding pad located in a bonding area and electrically connected to the device array; at least one support structure, wherein a first horizontal distance between the at least one support structure and the bonding pad is between 5 μm and 1000 μm; a first substrate; a first insulation layer located on the first substrate; and a second insulation layer located on the first insulation layer, wherein at least a portion of the at least one support structure is embedded in the second insulation layer, a first vertical distance formed between the at least one support structure and an upper surface of the first insulation layer is greater than 0 μm, the at least one support structure comprises a first portion and a second portion made of different materials, a material of the first portion of the at least one support structure comprises metal oxide, the second portion is located between the first insulation layer and the first portion, and a material of the second portion of the at least one support structure comprises metal. ### Claim 4 (depends on 3) The array substrate as claimed in claim 3, wherein the at least one support structure further comprises a third portion located between the second portion and the first portion, and a material of the third portion comprises an insulation material. ### Claim 5 (depends on 3) The array substrate as claimed in claim 3, further comprising: a third insulation layer located on the second insulation layer, the at least one support structure being further embedded into the third insulation layer, and the bonding pad comprising: a first conductive layer extending from the bonding area towards the device array, a second vertical distance being formed between a portion of the first conductive layer not being located in the bonding area and the upper surface of the first insulation layer, and the second vertical distance being between 0 μm and 1 μm. ### Claim 6 An array substrate, comprising: a device array; a bonding pad located in a bonding area and electrically connected to the device array; at least one support structure, wherein a first horizontal distance between the at least one support structure and the bonding pad is between 5 μm and 1000 μm; a first substrate; a first insulation layer located on the first substrate; and a second insulation layer located on the first insulation layer, wherein at least a portion of the at least one support structure is embedded in the second insulation layer, a first vertical distance formed between the at least one support structure and an upper surface of the first insulation layer is greater than 0 μm, the at least one support structure comprises a first portion and a second portion made of different materials, a material of the first portion of the at least one support structure comprises metal oxide, the second portion is located in the first portion, the second portion is not in contact with the first insulation layer, and a material of the second portion comprises an insulation material, wherein the insulation material comprises silicon nitride, silicon oxide, or polymethylmethaciylate (PMMA). ### Claim 7 (depends on 6) The array substrate as claimed in claim 6, further comprising: a third insulation layer located on the second insulation layer, the at least one support structure being further embedded into the third insulation layer; and a fourth insulation layer located on the third insulation layer. ### Claim 8 (depends on 7) The array substrate as claimed in claim 7, wherein the at least one support structure is further embedded into the fourth insulation layer. ### Claim 9 (depends on 6) The array substrate as claimed in claim 6, further comprising: an auxiliary structure, wherein a second horizontal distance formed between the auxiliary structure and the bonding pad is between 5 μm and 1000 μm. ### Claim 10 (depends on 9) The array substrate as claimed in claim 9, further comprising: a third insulation layer located on the second insulation layer, at least a portion of the auxiliary structure being embedded into the third insulation layer, and a material of the auxiliary structure comprising metal oxide, an insulation material, or a combination of the foregoing materials. ### Claim 11 An array substrate, comprising: a device array; a bonding pad located in a bonding area and electrically connected to the device array; at least one support structure, wherein a first horizontal distance between the at least one support structure and the bonding pad is between 5 μm and 1000 μm; a first substrate; a first insulation layer located on the first substrate; a second insulation layer located on the first insulation layer, wherein at least a portion of the at least one support structure is embedded in the second insulation layer, a first vertical distance is formed between the at least one support structure and a lower surface of the first insulation layer, the first vertical distance is between 0 μm and 1 μm; and a first conductive layer extending from the bonding area towards the device array, a portion of the first conductive layer located in the bonding area being embedded into the first insulation layer, a second vertical distance being formed between the portion of the first conductive layer and a lower surface of the first insulation layer, and the second vertical distance being between 0 μm and 1 μm. ### Claim 12 (depends on 11) The array substrate as claimed in claim 11, the at least one support structure comprising a main body portion embedded in the second insulation layer and a plurality of fork-like portions extending from the main body portion towards the first insulation layer, wherein the fork-like portions are embedded in the first insulation layer. ### Claim 13 (depends on 11) The array substrate as claimed in claim 11, wherein the at least one support structure comprises a first portion and a second portion stacked with the first portion along a direction perpendicular to the first substrate, the first portion and the second portion are embedded in the second insulation layer, a portion of the second insulation layer is sandwiched between the first portion and the second portion, and a material of the first portion and the second portion comprises metal. ### Claim 14 An array substrate, comprising: a device array; a bonding pad located in a bonding area and electrically connected to the device array; at least one support structure, wherein a first horizontal distance between the at least one support structure and the bonding pad is between 5 μm and 1000 μm; a first substrate; a first insulation layer located on the first substrate; a second insulation layer located on the first insulation layer, wherein at least a portion of the at least one support structure is embedded in the second insulation layer, a first vertical distance is formed between the at least one support structure and a lower surface of the first insulation layer, the first vertical distance is between 0 μm and 1 μm; and a first conductive layer extending from the bonding area towards the device may, a second vertical distance being formed between a portion of the first conductive layer not being located in the bonding area and an upper surface of the first insulation layer, a third vertical distance being formed between the at least one support structure and the upper surface of the first insulation layer, the third vertical distance being less than or equal to the second vertical distance, and the at least one support structure and the portion of the first conductive layer not being located in the bonding area belonging to a same film layer.