# US 10,312,175 B1 · Diamond air bridge for thermal management of high power devices

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- Number: US 10,312,175 B1
- Document ID: US10312175B1
- Status: Granted
- Kind: B1
- Application number: 15/945,803
- Filed: 2018-04-05
- Published: 2019-05-23
- Granted: 2019-06-04
- Earliest claimed: 2017-04-10
- Assignees: The United States of America as represented by the Secretary of the Navy
- Applicants: The United States of America, as represented by the Secretary of the Navy
- Inventors: Karl D. Hobart; Andrew D. Koehler; Francis J. Kub; Travis J. Anderson; Tatyana I. Feygelson; Marko J. Tadjer; Lunet E. Luna
- Web page: https://patentgrep.com/patent/US10312175B1

## CPC

- H10D 62/8303: {Diamond}
- H10W 74/147: {the encapsulations being multilayered}
- H10D 30/015: {of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT}
- H10D 30/475: {having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs}
- H10D 30/4755: {having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs}
- H10D 30/6738: {Schottky barrier electrodes}
- H10D 30/675: {Group III-V materials, Group II-VI materials, Group IV-VI materials, selenium or tellurium}
- H10D 62/115: {Dielectric isolations, e.g. air gaps}
- H10D 62/824: comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions
- H10D 62/85: being Group III-V materials, e.g. GaAs
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10D 64/511: {for IGFETs}
- H10D 64/512: {Disposition of the gate electrodes, e.g. buried gates}
- H10D 64/62: Electrodes ohmically coupled to a semiconductor
- H10D 64/64: Electrodes comprising a Schottky barrier to a semiconductor
- H10W 40/254: {Diamond}
- H10W 99/00: Subject matter not provided for in other groups of this subclass
- H10D 62/151: {of IGFETs (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713)}
- H10D 64/518: {characterised by their lengths or sectional shapes}
- H10W 74/137: {the encapsulations being directly on the semiconductor body (H10W74/134 takes precedence)}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A device structure and method for improving thermal management in highly scaled, high power electronic and optoelectronic devices such as GaN FET and AlGaN/GaN HEMT devices by implementing diamond air bridges into such devices to remove waste heat. The diamond air bridge can be formed from a polycrystalline diamond material layer which can be grown on the surface of a dielectric material layer, on the surface of a III-nitride material, or on the surface of a diamond polycrystalline nucleation layer, and may be optimized to have a high thermal conductivity at the growth interface with the underlying material.

## Claims

### Claim 1

An electronic device comprising:
a buffer layer disposed on a substrate;
a barrier layer epitaxially grown on an upper surface of the buffer layer;
a source, a gate, and a drain contact disposed on an upper surface of the barrier layer;
a polycrystalline diamond material layer extending between the source, gate, and drain;
wherein the diamond material layer is separated from the upper surface of the barrier layer by an air gap so as to form a suspended diamond air bridge between the source and the gate and between the gate and the drain.

### Claim 2 (depends on 1)

The electronic device according to claim 1, wherein the diamond material layer extends along an upper surface of the source, gate, and drain and is patterned to form openings for electronic contact to the source, gate, and drain.

### Claim 3 (depends on 1)

The electronic device according to claim 1, wherein the diamond material layer is extends along an upper surface of the source and drain and is patterned to form openings for electronic contact to the source and the drain, the diamond material layer further being patterned to form an opening for the gate, the gate protruding above and extending laterally along an upper surface of the diamond material layer.

### Claim 4 (depends on 1)

The electronic device according to claim 1, wherein the diamond material layer is a nanocrystalline diamond material layer.

### Claim 5 (depends on 1)

The electronic device according to claim 1, further comprising a passivation layer disposed on the upper surface of the barrier layer between the source and the gate and between the gate and the drain.

### Claim 6 (depends on 5)

The electronic device according to claim 5, further comprising a dielectric layer disposed on an upper surface of the passivation layer, along the sides of the gate, and between the gate and the barrier layer.

### Claim 7 (depends on 1)

The electronic device according to claim 1, further comprising a dielectric layer disposed on an upper surface of the diamond material layer.

### Claim 8 (depends on 1)

The electronic device according to claim 1, wherein a portion of the gate electrode extends through the diamond material layer to the upper surface of the barrier layer, the device further comprising a dielectric layer disposed on an upper surface of the diamond material layer and along the sides of the gate so as to encapsulate the portion of the gate extending though the diamond material layer to the upper surface of the barrier layer.

### Claim 9 (depends on 1)

The electronic device according to claim 1, further comprising a first dielectric layer disposed on an upper surface of the barrier layer, on a lower surface of the diamond material layer, and on sides of the source, gate, and drain electrodes so as to encapsulate the air cap between the diamond material layer and the barrier layer.

### Claim 10 (depends on 9)

The electronic device according to claim 9, further comprising a second dielectric material layer disposed on an upper surface of the diamond material layer and along sides and a top of the gate; and
further comprising a passivation layer deposited on an upper surface of the second diamond material layer.

### Claim 11 (depends on 1)

The electronic device according to claim 1, wherein the electronic device comprises an AlGaN/GaN high-electron mobility transistor having a GaN buffer layer and an AlGaN barrier layer.

### Claim 12 (depends on 1)

The electronic device according to claim 1, wherein the source and drain electrodes comprise titanium, aluminum, platinum, nickel, gold or layered combinations thereof.

### Claim 13 (depends on 1)

The electronic device according to claim 1, wherein the source and drain comprise an n+ epitaxial layer having an ohmic layer deposited thereon.

### Claim 14 (depends on 1)

The electronic device according to claim 1, wherein the gate comprises a metal nitride material layer, a refractory metal layer, an alloy metal layer, or a copper layer in contact with the surface of the III-nitride material.