# US 10,312,164 B2 · Method and system for intelligent weak pattern diagnosis, and non-transitory computer-readable storage medium

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 10,312,164 B2
- Document ID: US10312164B2
- Status: Granted
- Kind: B2
- Application number: 14/281,909
- Filed: 2014-05-20
- Published: 2014-11-20
- Granted: 2019-06-04
- Earliest claimed: 2013-05-20
- Assignees: Elite Semiconductor Inc.
- Applicants: Elitetech Technology Co., Ltd.
- Inventors: Iyun Leu
- Web page: https://patentgrep.com/patent/US10312164B2

## CPC

- H10P 74/23: {characterised by multiple measurements, corrections, marking or sorting processes}
- G01R 31/318544: {Scanning methods, algorithms and patterns (G01R31/3183 takes precedence)}
- H10P 74/203: {Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)

## Abstract

Disclosure herein is related to a method and a system for intelligent weak pattern diagnosis for semiconductor product, and a related non-transitory computer-readable storage medium. In the method, a weak pattern layout is firstly retrieved from a defect pattern library and a frequent failure defect pattern library; defect data is retrieved from fab defect inspection tool; a design layout is then received and weak defect pattern screen is performed to extract known and unknown weak defect patterns. In addition to updating the weak pattern library, the weak pattern contour can be made upon SEM image data, and then the true systematic weak pattern can be justified.

## Claims

### Claim 1

A method of an intelligent weak pattern by a computer-implemented intelligent weak pattern diagnosis system with a defect scan and inspection tool in a fab to defect an inspection data, comprising:
creating at least one basic matching element over an object under test;
introducing, by a processor, a weak pattern layout from a defect pattern library and a frequent failure defect pattern library;
acquiring, by the processor, the defect inspection data by using a defect inspection tool in the fab;
introducing, by the processor, a design layout data which at least includes various systematic defect and weak patterns;
executing, by the processor, weak pattern screen and filter to acquire a known weak pattern group by comparing the weak patterns from the libraries and the design layout, the design layout data compared with weak patterns in the defect pattern library and the frequent failure defect pattern library, and being categorized into a known weak pattern group;
performing, by the processor, unknown weak pattern screen and filter, wherein the weak patterns found from pattern similarity matching, which do not belong to and are not the same as the weak patterns in the defect pattern library and the frequent failure defect pattern library, are found as compared with the design layout from the computer system, and being categorized into an unknown weak pattern group;
obtaining, by the processor, distribution of the known weak pattern group and the unknown weak pattern group;
acquiring, by the processor, an image of the object under test within the unknown weak pattern group having the similar but not identical weak patterns, so as to obtain the coordinates and metrology data of the weak patterns on the object under test;
converting the defect or weak patterns found on the coordinate system of design layout with an origin (x0, y0) to the coordinate system with the origin (x1, y1) of the defect inspection tool that scans the real semiconductor product;
performing, by the processor, image processing to obtain contour of the weak patterns, dimension, range and number of the weak patterns by using the coordinate system to update the weak pattern library; and
detecting, by the processor, a defect on the real semiconductor product using by contour matching using the weak pattern layout in the updated weak pattern library.

### Claim 2 (depends on 1)

The method according to claim 1, wherein the step of weak pattern screen and filter includes a step of contour matching, wherein:
introducing one or more basic matching elements and one or more basic polygon pattern matching elements; and
comparing with patterns on the object under test.

### Claim 3 (depends on 2)

The method according to claim 2, wherein, in the step of contour matching, an overlapped area percentage of the every pattern of the object under test and the one basic matching element or basic polygon pattern matching element is as basis of judgment, and further in view of centerline of the basic matching element or the basic polygon pattern matching element, so as to judge a similar weak pattern within an acceptable tolerance.

### Claim 4 (depends on 3)

The method according to claim 3, wherein, in the step of contour matching using the centerline of the basic matching element or the basic polygon pattern matching element, dimension of every matching element, direction, distance, and connection between the matching elements are introduced.

### Claim 5 (depends on 4)

The method according to claim 4, wherein the basic polygon pattern matching element is a geometric patterns having one or more turning points; the contour matching is performed when the basic polygon pattern matching element is in clockwise or counterclockwise rotation with instant adjustment of size of the basic polygon pattern matching element, so as to find out the same or similar weak pattern.

### Claim 6 (depends on 5)

The method according to claim 5, wherein the weak pattern is verified by compared with the basic matching element or the basic polygon pattern matching element, and the defect pattern library is updated.

### Claim 7 (depends on 1)

The method according to claim 1, wherein the image of object under test is obtained by inspection by a scanning electron microscope, e-Beam, or an optical microscope.

### Claim 8 (depends on 7)

The method according to claim 7, wherein the scanning electron microscope is used to monitor and preview the object under test, and an e-Beam scan tool is used to detect and verify the weak patterns on the object under test.

### Claim 9 (depends on 8)

The method according to claim 8, wherein the method is applicable to a wafer manufacturing process in the fab.

### Claim 10 (depends on 8)

The method according to claim 8, wherein the method is applicable to a process in assembly house or the mask house.

### Claim 11 (depends on 8)

The method according to claim 8, wherein the method is applicable to a manufacturing process for printed circuit board, carrier board, flexible board, flat display panel, wafer bump, light-emitting diode, or solar cell.

### Claim 12

An intelligent weak pattern diagnosis system for diagnosing the intelligent weak pattern being implemented by a computer, comprising:
creating at least one basic matching element over an object under test;
introducing, by a processor, a weak pattern layout from a defect pattern library and a frequent failure defect pattern library;
acquiring, by the processor, the defect inspection data by a defect inspection tool in a process plant;
introducing, by the processor, design layout data which includes systematic defect and weak patterns;
executing, by the processor, weak pattern screen and filter to acquire a known weak pattern group by comparing the weak patterns from the libraries and the design layout, in which the design layout data is compared with weak patterns recorded in the defect pattern library and the frequent failure defect pattern library, so as to acquire a known weak pattern group;
performing, by the processor, unknown weak pattern screen and filter, in which pattern similarity matching is performed on the design layout data acquired by the computer, so as to find out weak patterns, which do not belong to and are not similar with the patterns in the defect pattern library or the frequent failure defect pattern library, categorized into a unknown weak pattern group;
acquiring, by the processor, distribution of the known weak pattern group and the unknown weak pattern group;
acquiring, by the processor, an image of object under test, including coordinates and metrology data of the weak patterns of the object under test;
converting the defect or weak patterns found on the coordinate system of design layout with an origin (x0, y0) to the coordinate system with the origin (x1, y1) of the defect inspection tool that scans the real semiconductor product;
performing, by the processor, image processing, for acquiring contour of the weak patterns, dimension, range and number of the weak patterns to update the weak pattern library; and
detecting, by the processor, a defect on the real semiconductor product using by contour matching using the weak pattern layout in the updated weak pattern library.

### Claim 13 (depends on 12)

The system according to claim 12, wherein the weak pattern screen and filter includes a contour matching, wherein:
introducing one or more basic matching elements and one or more basic polygon pattern matching elements; and
comparing with patterns on the object under test.

### Claim 14 (depends on 13)

The system according to claim 13, wherein contour matching introduces an overlapped area percentage of the every pattern of the object under test for judgment of the weak patterns.

### Claim 15 (depends on 14)

The system according to claim 14, wherein one basic matching element or basic polygon pattern matching element, and further in view of centerline of the basic matching element or the basic polygon pattern matching element are as basis of judgment of the weak patterns within an acceptable tolerance.

### Claim 16 (depends on 15)

The system according to claim 15, wherein contour matching using the centerline of the basic matching element or the basic polygon pattern matching element introduces dimension of every matching element, direction, distance, and connection between the matching elements.

### Claim 17 (depends on 16)

The system according to claim 16, wherein the basic polygon pattern matching element is a geometric patterns having one or more turning points; and the contour matching is performed when the basic polygon pattern matching element is in clockwise or counterclockwise rotation with instant adjustment of size of the basic polygon pattern matching element.

### Claim 18 (depends on 12)

The system according to claim 12, wherein the weak pattern is verified by compared with the basic matching element or the basic polygon pattern matching element, and the defect pattern library is updated.

### Claim 19

An instruction set for diagnosing an intelligent weak pattern stored in a non-transitory computer-readable storage medium, wherein the instruction set comprises:
creating at least one basic matching element over an object under test;
introducing, by a processor, weak pattern layout from a defect pattern library and a frequent failure defect pattern library;
acquiring, by the processor, defect inspection data by a defect inspection tool in a process plant;
introducing, by the processor, the design layout data, including various systematic defect and weak patterns;
executing, by the processor, weak pattern screen and filter to acquire a known weak pattern group by comparing the weak patterns from the libraries and the design layout, for comparing the design layout data with the weak patterns recorded in the defect pattern library and the frequent failure defect pattern library, so as to acquire a unknown weak pattern group;
performing, by the processor, unknown weak pattern screen and filter, including performing pattern similarity matching on the design layout data for finding out the weak patterns, which do not belong to and are not similar with the patterns recorded in the defect pattern library or the frequent failure defect pattern library, so as to acquire a unknown weak pattern group;
acquiring, by the processor, distribution of the known weak pattern group and the unknown weak pattern group;
acquiring, by the processor, an image of object under test, including coordinates and metrology data of the weak patterns of the object under test;
converting the defect or weak patterns found on the coordinate system of design layout with an origin (x0, y0) to the coordinate system with the origin (x1, y1) of the defect inspection tool that scans the real semiconductor product;
performing, by the processor, image processing, for acquiring contour of the weak patterns, dimension, range and number of the weak patterns, so as to judge systematic weak patterns;
updating, by the processor, the weak pattern library; and
detecting, by the processor, a defect on the real semiconductor product using by contour matching using the weak pattern layout in the updated weak pattern library.
