# US 10,312,141 B2 · Preclean methodology for superconductor interconnect fabrication

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- Number: US 10,312,141 B2
- Document ID: US10312141B2
- Status: Granted
- Kind: B2
- Application number: 15/238,394
- Filed: 2016-08-16
- Published: 2018-02-22
- Granted: 2019-06-04
- Earliest claimed: 2016-08-16
- Assignees: Northrop Grumman Systems Corporation
- Applicants: Christopher F. Kirby; Sandro J. Di Giacomo; Michael Rennie
- Inventors: Christopher F. Kirby; Sandro J. Di Giacomo; Michael Rennie
- Web page: https://patentgrep.com/patent/US10312141B2

## CPC

- H10W 20/064: {by modifying the conductivity of conductive parts, e.g. by alloying}
- H10P 70/277: {the processing being a planarisation of conductive layers}
- H10W 20/056: {by filling conductive material into holes, grooves or trenches}
- H10W 20/4484: {Superconducting materials}
- Y02E 40/60: Superconducting electric elements or equipment; Power systems integrating superconducting elements or equipment
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- Y02E: REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION

## Abstract

A method is provided of forming a superconductor device interconnect structure. The method includes forming a first dielectric layer overlying a substrate, and forming a superconducting interconnect element in a first dielectric layer, such that the superconducting interconnect element has a top surface aligned with a top surface of the first dielectric layer to form a first interconnect layer. The method also includes performing a plasma clean on a top surface of the first interconnect layer, and depositing a second dielectric layer over the first dielectric layer.

## Claims

### Claim 1

A method of forming a superconductor device interconnect structure, the method comprising:
forming a first dielectric layer overlying a substrate;
forming a superconducting interconnect element in a first dielectric layer, the interconnect element having a top surface aligned with a top surface of the first dielectric layer to form a first interconnect layer;
performing a cleaning process on a top surface of the first interconnect layer, the cleaning process comprising introducing tetrafluoromethane (CF4) gas into the environment of the first interconnect layer concurrently with oxygen, stopping the introduction of oxygen after a first predetermined time period and setting etch parameters in the environment to start the cleaning process for a second predetermined time period to remove any oxidation off the top surface of the superconducting contact or conductive line; and
depositing a second dielectric over the first interconnect layer.

### Claim 2 (depends on 1)

The method of claim 1, wherein the cleaning process is a tetrafluoromethane (CF4) based plasma clean etch process.

### Claim 3 (depends on 2)

The method of claim 2, wherein the superconducting interconnect element is formed from niobium.

### Claim 4 (depends on 2)

The method of claim 2, wherein the forming a superconducting interconnect element that has a top surface aligned with the top surface of the first dielectric layer to form a first interconnect layer comprises forming openings in the first dielectric layer, performing a contact material fill to fill the formed openings, and performing a chemical mechanical polish (CMP) to align a top surface of the superconducting interconnect element with a top surface of the first dielectric layer, wherein the plasma clean removes oxidization on a top surface of the superconducting interconnect element caused by the CMP.

### Claim 5 (depends on 1)

The method of claim 1, wherein at least one of the dielectric material employed in the first dielectric layer and the second dielectric layer is formed of a dielectric material that can form at a temperature of about or below 160° Celsius.

### Claim 6 (depends on 1)

The method of claim 1, wherein the superconducting interconnect element is a first conductive line and further comprising forming a second conductive line and a first contact in the second dielectric layer and a third conductive line and a second contact in the second dielectric layer, the first and second contacts being coupled to different portions of the first conductive line.

### Claim 7 (depends on 1)

The method of claim 1, wherein the cleaning process comprises:
placing the first interconnect layer in a preclean chamber;
setting the chamber pressure to about 100 mT (millitorr), and concurrently introducing tetrafluoromethane (CF4) gas at a flow rate of about 90 standard cubic centimeters per minute (sccm), and oxygen at a flow rate of about 15 sccm for a first predetermined time period;
turning RF power in the preclean chamber to about 1 Watt (W) for a second predetermined time period;
increasing the RF power to about 50 W and setting the magnetic field in the preclean chamber to about 60 gauss (G) for a third predetermined time period;
stopping the flow of oxygen for a fourth predetermined time period; and
stopping the flow of tetrafluoromethane (CF4) gas and turning off the power and magnetic field in the preclean chamber for a fifth predetermined time period.

### Claim 8 (depends on 7)

The method of claim 7, wherein the first predetermined time period is about 20 seconds, the second predetermined time period is about 1 second, the third predetermined time period is about 5 seconds, the fourth predetermined time period is about 10 seconds and the fifth predetermined time period is at least five seconds.

### Claim 9

A method of forming a superconductor device interconnect structure, the method comprising:
disposing a superconducting interconnect layer in a preclean chamber, the superconducting interconnect layer having a superconducting contact or conductive line having a top surface aligned with a top surface of a first dielectric layer, wherein a top surface of the superconducting contact or conductive line has an oxidized layer, wherein the superconducting material employed to form the superconducting contact or conductive line is niobium (Nb) and the oxidized layer is niobium oxide;
introducing tetrafluoromethane (CF4) gas into the preclean chamber;
setting etch conditions to induce a plasma clean etch with the tetrafluoromethane (CF4) gas for a predetermined time period to break the oxidized layer from the superconducting contact or conductive line to produce niobium fluoride (NbF5) gas and oxygen (O2) gas that evaporates off the surface of the niobium to form a clean niobium top surface;
disposing the interconnect layer in a deposition chamber; and
depositing a second dielectric over the interconnect layer.

### Claim 10 (depends on 9)

The method of claim 9, further comprising introducing oxygen (O2) into the preclean chamber concurrently with the introducing of the tetrafluoromethane (CF4) gas for a predetermined time period to ensure a sufficiently high number of fluorine radicals exist for an effective bulk removal of the metal-oxide layer.

### Claim 11 (depends on 9)

The method of claim 9, wherein the superconductor device interconnect structure is moved from the preclean chamber to the deposition chamber in vacuum to avoid any unwanted oxidation.

### Claim 12 (depends on 9)

The method of claim 9, wherein the preclean chamber and the deposition chamber are mounted on different mainframes with the delay between moving from the preclean chamber to deposition chamber being controlled to minimize the time spent at atmosphere.

### Claim 13 (depends on 9)

The method of claim 9, wherein the setting etch conditions comprises setting the pressure of the preclean chamber, the gas flow of the tetrafluoromethane (CF4) gas, the RF power of the preclean chamber and the magnetic field of the preclean chamber for performing a plasma clean etch.

### Claim 14

A method of forming a superconductor device interconnect structure, the method comprising:
depositing niobium in openings in a first dielectric layer overlying a substrate to form one or more superconducting interconnect elements in the first dielectric layer;
performing a chemical mechanical polish (CMP) to align a top surface of the one or more superconducting interconnect elements with a top surface of the first dielectric layer, wherein the CMP causes oxidization on a top surface of the one or more superconducting interconnect elements;
performing a plasma clean on the oxidation by introducing tetrafluoromethane (CF4) gas into an environment of the first dielectric layer and setting etch conditions to induce a plasma clean etch with the tetrafluoromethane (CF4) gas; and
depositing a second dielectric over the first interconnect layer.

### Claim 15 (depends on 14)

The method of claim 14, wherein the plasma clean comprises:
placing the first interconnect layer in a preclean chamber;
setting the chamber pressure to about 100 mT (millitorr), and concurrently introducing tetrafluoromethane (CF4) gas at a flow rate of about 90 standard cubic centimeters per minute (sccm), and oxygen at a flow rate of about 15 sccm for a first predetermined time period;
turning RF power in the preclean chamber to about 1 Watt (W) for a second predetermined time period;
increasing the RF power to about 50 W and setting the magnetic field in the preclean chamber to about 60 gauss (G) for a third predetermined time period;
stopping the flow of oxygen for a fourth predetermined time period; and
stopping the flow of tetrafluoromethane (CF4) gas and turning off the power and magnetic field in the preclean chamber for a fifth predetermined time period.

### Claim 16

A method of forming a superconductor device interconnect structure, the method comprising:
forming a first dielectric layer overlying a substrate;
forming a superconducting interconnect element in a first dielectric layer, the interconnect element having a top surface aligned with a top surface of the first dielectric layer to form a first interconnect layer comprises forming openings in the first dielectric layer;
performing a contact material fill to fill the formed openings;
performing a chemical mechanical polish (CMP) to align a top surface of the superconducting interconnect element with a top surface of the first dielectric layer;
performing a cleaning process on a top surface of the first interconnect layer, wherein the cleaning process is a tetrafluoromethane (CF4) based plasma clean etch process that removes oxidation on a top surface of the superconducting interconnect element caused by the CMP; and
depositing a second dielectric over the first interconnect layer.