# US 10,312,130 B2 · LTPS array substrate, method for manufacturing the same, and display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,312,130 B2 - Document ID: US10312130B2 - Status: Granted - Kind: B2 - Application number: 14/897,325 - Filed: 2015-08-05 - Published: 2018-05-24 - Granted: 2019-06-04 - Earliest claimed: 2015-07-27 - Assignees: Shenzhen China Star Optoelectronics Technology Co., Ltd. - Applicants: Shenzhen China Star Optoelectronics Technology Co., Ltd. - Inventors: Yaru Jiang - Web page: https://patentgrep.com/patent/US10312130B2 ## CPC - H10D 86/451: {characterised by the compositions or shapes of the interlayer dielectrics} - G02F 1/13: based on liquid crystals, e.g. single liquid crystal display cells - H10D 86/021: {of multiple TFTs} - H10D 86/60: wherein the TFTs are in active matrices - H10H 29/14: comprising multiple light-emitting semiconductor components - H10W 29/00: Generic parts of integrated devices, not otherwise provided for - H10W 29/01: {Manufacture or treatment} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS - H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract An LTPS array substrate, a method for manufacturing the same, and a display device are disclosed. According to the method, a flat layer is formed on an electrode. The flat layer is formed through washing, baking to remove water, hydrophobization treatment, photoresist coating, drying in vacuum, pre-baking, exposing, developing, baking, and aching procedures in sequence, and the baking procedure comprises at least baking for twice with different temperatures. According to the method, the organic film of the flat layer can be preliminarily solidified. In this manner, the problem that the taper angle at via hole position is too small, which is resulted from the liquidity of photoresist material of the flat layer, can be solved. ## Claims ### Claim 1 A method for manufacturing an LTPS array substrate, comprising forming a flat layer on an electrode, wherein the flat layer is formed through washing, baking to remove water, hydrophobization treatment, photoresist coating, drying in vacuum, pre-baking, exposing, developing, baking, and ashing procedures in sequence; and wherein the baking procedure comprises at least baking for twice with different temperatures. ### Claim 2 (depends on 1) The method according to claim 1, wherein the baking procedure comprises post-baking and oven baking in sequence; and wherein a temperature of the post-baking is lower than a temperature of the oven baking. ### Claim 3 (depends on 2) The method according to claim 2, wherein the temperature of the post-baking ranges from 110 to 130° C. ### Claim 4 (depends on 3) The method according to claim 3, wherein the temperature of the post-baking is 120° C. ### Claim 5 (depends on 4) The method according to claim 4, wherein a time of the post-baking ranges from 2 to 4 minutes. ### Claim 6 (depends on 2) The method according to claim 2, wherein the temperature of the oven baking ranges from 210 to 230° C. ### Claim 7 (depends on 3) The method according to claim 3, wherein the temperature of the oven baking ranges from 210 to 230° C. ### Claim 8 (depends on 4) The method according to claim 4, wherein the temperature of the oven baking ranges from 210 to 230° C. ### Claim 9 (depends on 5) The method according to claim 5, wherein the temperature of the oven baking ranges from 210 to 230° C. ### Claim 10 (depends on 6) The method according to claim 6, wherein a temperature of the pre-baking ranges from 80 to 100° C., and a time of the pre. baking ranges from 1.5 to 2 minutes. ### Claim 11 (depends on 1) The method according to claim 1, wherein the exposing procedure comprises two steps of middle part exposing and edges exposing. ### Claim 12 An LIPS array substrate, wherein the LTPS array substrate is manufactured through the following method: the method comprises forming a flat layer on an electrode, wherein the flat layer is formed through washing, baking to remove water, hydrophobization treatment, photoresist coating, drying in vacuum, pre-baking, exposing, developing, baking, and aching procedures in sequence; and wherein the baking procedure comprises at least baking for twice with different temperatures. ### Claim 13 (depends on 12) The LIPS array substrate according to claim 12, wherein the baking procedure comprises post-baking and oven baking in sequence; and wherein a temperature of the post-baking is lower than a temperature of the oven baking. ### Claim 14 (depends on 13) The LIPS array substrate according to claim 13, wherein the temperature of the post-baking ranges from 110 to 130° C. ### Claim 15 (depends on 14) The LIPS array substrate according to claim 14, wherein the temperature of the post-baking is 120° C. ### Claim 16 (depends on 15) The LTPS array substrate according to claim 15, wherein a time of the post-baking ranges from 2 to 4 minutes. ### Claim 17 (depends on 13) The LIPS array substrate according to claim 13, wherein the temperature of the oven baking ranges from 210 to 230° C. ### Claim 18 (depends on 17) The LIPS array substrate according to claim 17, wherein a temperature of the pre-baking ranges from 80 to 100° C., and a time of the pre-baking ranges from 1.5 to 2 minutes. ### Claim 19 (depends on 12) The LTPS array substrate according to claim 12, wherein the exposing procedure comprises two steps of middle part exposing and edges exposing. ### Claim 20 A display device, comprising an LIPS array substrate, wherein the LIPS array substrate is manufactured through the following method: the method comprises forming a flat layer on an electrode, wherein the flat layer is formed through washing, baking to remove water, hydrophobization treatment, photoresist coating, drying in vacuum, pre-baking, exposing, developing, baking, and ashing procedures in sequence; and wherein the baking procedure comprises at least baking for twice with different temperatures.