# US 10,312,112 B2 · Integrated fan-out package having multi-band antenna and method of forming the same

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- Number: US 10,312,112 B2
- Document ID: US10312112B2
- Status: Granted
- Kind: B2
- Application number: 15/627,457
- Filed: 2017-06-20
- Published: 2018-12-20
- Granted: 2019-06-04
- Earliest claimed: 2017-06-20
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Co., Ltd.
- Inventors: Nan-Chin Chuang; Ching-Feng Yang; Kai-Chiang Wu
- Web page: https://patentgrep.com/patent/US10312112B2

## CPC

- H10W 74/014: {using batch processing}
- H10P 72/74: {using temporarily an auxiliary support}
- H10P 90/1916: {with separation or delamination along an ion implanted layer, e.g. Smart-cut}
- H10W 10/011: {of isolation regions comprising dielectric materials}
- H10W 10/10: Isolation regions comprising dielectric materials
- H10W 10/181: {Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers}
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 70/614: {the multiple chips being integrally enclosed}
- H10W 70/685: comprising multiple insulating layers
- H10P 72/743: {used as a support during manufacture of interconnect decals or build up layers}
- H10P 72/7436: {used to support a device or a wafer when forming electrical connections thereto}
- H10P 72/744: {Details of chemical or physical process used for separating the auxiliary support from a device or a wafer}
- H10W 44/248: {for antennas}
- H10W 70/09: extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
- H10W 70/099: {Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers}
- H10W 70/655: Fan-out layouts
- H10W 72/01225: {in solid form, e.g. by using a powder or by stud bumping}
- H10W 72/01235: {by plating, e.g. electroless plating or electroplating}
- H10W 72/01238: {in gaseous form, e.g. by CVD or PVD}
- H10W 72/07307: {the auxiliary member being a temporary substrate, e.g. a removable substrate}
- H10W 72/241: {Dispositions, e.g. layouts}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/354: {comprising polymers}
- H10W 72/9413: {on encapsulations}
- H10W 72/9415: {relative to the surface, e.g. recessed, protruding}
- H10W 72/942: {relative to underlying supporting features, e.g. bond pads, RDLs or vias}
- H10W 74/117: {the substrate having spherical bumps for external connection}
- H10W 90/00: Package configurations
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

An integrated fan-out package having a multi-band antenna and a method of forming the same are disclosed. An integrated fan-out package includes a semiconductor die, a molding layer and a plurality of through integrated fan-out vias. The molding layer is aside the semiconductor die. The through integrated fan-out vias are through the molding layer and arranged to form a plurality of dipole antennas. At least one of the plurality of dipole antennas includes two dipole arms each having a transmitting strip and a radiating strip connected to the transmitting part, and the radiating strip has a first part, a second part and a filter part between and in contact with the first part and the second part. The cross-sectional area of the filter part is less than the cross-sectional area of the first part or the second part of the radiating strip.

## Claims

### Claim 1

An integrated fan-out package having a multi-band antenna, comprising:
a semiconductor die;
a molding layer aside the semiconductor die; and
a plurality of through integrated fan-out vias through the molding layer and arranged to form a plurality of dipole antennas,
wherein at least one of the plurality of dipole antennas comprises two dipole arms each having a transmitting strip and a radiating strip connected to the transmitting strip, and the radiating strip has a first part, a second part and a filter part between and in contact with the first part and the second part, wherein a cross-sectional area of the filter part is less than a cross-sectional area of the first part or the second part of the radiating strip.

### Claim 2 (depends on 1)

The integrated fan-out package of claim 1, wherein the filter part of the radiating strip has at least one void therein.

### Claim 3 (depends on 2)

The integrated fan-out package of claim 2, wherein the at least one void penetrates through the filter part of the radiating strip.

### Claim 4 (depends on 2)

The integrated fan-out package of claim 2, wherein the molding layer fills in the at least one void in the filter part of the radiating strip.

### Claim 5 (depends on 1)

The integrated fan-out package of claim 1, wherein the filter part of the radiating strip has at least one recess on a sidewall thereof.

### Claim 6 (depends on 1)

The integrated fan-out package of claim 1, wherein the radiating strip further has another filter part and a third part, and the another filter part is between and in contact with the second part and the third part.

### Claim 7 (depends on 1)

The integrated fan-out package of claim 1, further comprising a first redistribution layer structure at a first side of the semiconductor die and arranged to form a patch antenna ground.

### Claim 8 (depends on 7)

The integrated fan-out package of claim 7, further comprising at least one patch antenna at the first side of the semiconductor die and over the patch antenna ground.

### Claim 9 (depends on 8)

The integrated fan-out package of claim 8, wherein the patch antenna has a first region, a second region and a filter region between and in contact with the first region and the second region, and wherein the filter region of the patch antenna has at least one void therein.

### Claim 10 (depends on 9)

The integrated fan-out package of claim 9, wherein the second region surrounds the filter region of the patch antenna.

### Claim 11 (depends on 9)

The integrated fan-out package of claim 9, wherein the at least one void penetrates through the filter region of the patch antenna.

### Claim 12

An integrated fan-out package having a multi-band antenna, comprising:
a semiconductor die;
a molding layer aside the semiconductor die; and
a plurality of first through integrated fan-out vias through the molding layer and arranged to form a plurality of first dipole antennas; and
a plurality of second through integrated fan-out vias through the molding layer and arranged to form a plurality of second dipole antennas,
wherein an operating frequency band of the first dipole antennas is different from an operating frequency band of the second dipole antennas, and the first dipole antennas and the second dipole antennas are in a staggered arrangement.

### Claim 13 (depends on 12)

The integrated fan-out package of claim 12, wherein the first dipole antennas surround the second dipole antennas, and the operating frequency band of the first dipole antennas is greater than the operating frequency band of the second dipole antennas.

### Claim 14 (depends on 12)

The integrated fan-out package of claim 12, wherein at least one of the first and second dipole antennas comprises two dipole arms each having a transmitting strip and a radiating strip connected to the transmitting strip, and the radiating strip has a first part, a second part and a filter part between and in contact with the first part and the second part, and wherein a cross-sectional area of the filter part is less than a cross-sectional area of the first part or the second part of the radiating strip.

### Claim 15 (depends on 14)

The integrated fan-out package of claim 14, wherein the filter part of the radiating strip has at least one void therein.

### Claim 16 (depends on 12)

The integrated fan-out package of claim 12, further comprising a first redistribution layer structure at a first side of the semiconductor die and arranged to form a patch antenna ground.

### Claim 17 (depends on 16)

The integrated fan-out package of claim 16, further comprising at least one patch antenna at the first side of the semiconductor die and over the patch antenna ground.

### Claim 18 (depends on 17)

The integrated fan-out package of claim 17, wherein the patch antenna has a first region, a second region and a filter region between and in contact with the first region and the second region, and wherein the filter region of the patch antenna has at least one void therein.

### Claim 19 (depends on 18)

The integrated fan-out package of claim 18, wherein the second region surrounds the filter region of the patch antenna.

### Claim 20

A method of forming an integrated fan-out package having a multi-band antenna, comprising:
providing a semiconductor die;
forming a plurality of through integrated fan-out vias aside the semiconductor die, wherein forming the through integrated fan-out vias comprises forming a plurality of dipole antennas; and
forming a molding layer surrounding the through integrated fan-out vias.
